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fix two syntax errors in src/soc/decoder/isa/caller.py
author
Tobias Platen
<tplaten@posteo.de>
Sun, 31 Jan 2021 18:48:18 +0000
(19:48 +0100)
committer
Tobias Platen
<tplaten@posteo.de>
Sun, 31 Jan 2021 18:48:18 +0000
(19:48 +0100)
src/soc/decoder/isa/caller.py
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diff --git
a/src/soc/decoder/isa/caller.py
b/src/soc/decoder/isa/caller.py
index bd516ebb6d0d985bdb136ec12134f0908d7599aa..e85cd6269f54f5de1da71709ad58e7ce73d1a8e7 100644
(file)
--- a/
src/soc/decoder/isa/caller.py
+++ b/
src/soc/decoder/isa/caller.py
@@
-218,7
+218,7
@@
class SVP64State:
def __init__(self, init=0):
self.spr = SelectableInt(init, 32)
# fields of SVSTATE, see https://libre-soc.org/openpower/sv/sprs/
def __init__(self, init=0):
self.spr = SelectableInt(init, 32)
# fields of SVSTATE, see https://libre-soc.org/openpower/sv/sprs/
- self.maxvl = FieldSelectableInt(self.spr, tuple(range(0,7))
+ self.maxvl = FieldSelectableInt(self.spr, tuple(range(0,7))
)
self.vl = FieldSelectableInt(self.spr, tuple(range(7,14)))
self.srcstep = FieldSelectableInt(self.spr, tuple(range(14,21)))
self.dststep = FieldSelectableInt(self.spr, tuple(range(21,28)))
self.vl = FieldSelectableInt(self.spr, tuple(range(7,14)))
self.srcstep = FieldSelectableInt(self.spr, tuple(range(14,21)))
self.dststep = FieldSelectableInt(self.spr, tuple(range(21,28)))
@@
-246,7
+246,7
@@
class SPP64PrefixFields:
self.insn = SelectableInt(0, 32)
# 6 bit major opcode EXT001, 2 bits "identifying" (7, 9), 24 SV ReMap
self.major = FieldSelectableInt(self.insn, tuple(range(0,6)))
self.insn = SelectableInt(0, 32)
# 6 bit major opcode EXT001, 2 bits "identifying" (7, 9), 24 SV ReMap
self.major = FieldSelectableInt(self.insn, tuple(range(0,6)))
- self.pid = FieldSelectableInt(self.insn, (7, 9) # must be 0b11
+ self.pid = FieldSelectableInt(self.insn, (7, 9)
)
# must be 0b11
rmfields = [6, 8] + list(range(10,32)) # SVP64 24-bit RM
self.rm = FieldSelectableInt(self.spr, rmfields)
rmfields = [6, 8] + list(range(10,32)) # SVP64 24-bit RM
self.rm = FieldSelectableInt(self.spr, rmfields)