From: Tobias Platen Date: Mon, 4 Jan 2021 17:58:31 +0000 (+0100) Subject: test_countzero.py: rename output files X-Git-Tag: 24jan2021_ls180~38 X-Git-Url: https://git.libre-soc.org/?p=soc.git;a=commitdiff_plain;h=0558924a3a25c95542ee684b8c8edc05213ca30a test_countzero.py: rename output files --- diff --git a/src/soc/fu/logical/test/test_countzero.py b/src/soc/fu/logical/test/test_countzero.py index 3a78fd8f..62376ae6 100644 --- a/src/soc/fu/logical/test/test_countzero.py +++ b/src/soc/fu/logical/test/test_countzero.py @@ -87,7 +87,7 @@ class ZeroCounterTestCase(FHDLTestCase): sim.add_process(process) # or sim.add_sync_process(process), see below # run test and write vcd - fn = "genullnau" + fn = "countzero" with sim.write_vcd(fn+".vcd", fn+".gtkw", traces=dut.ports()): sim.run()