From: Luke Kenneth Casson Leighton Date: Fri, 12 Jun 2020 15:28:32 +0000 (+0100) Subject: note possible BE/LE mode needed for memory reads/writes X-Git-Tag: div_pipeline~389 X-Git-Url: https://git.libre-soc.org/?p=soc.git;a=commitdiff_plain;h=445820e919aa89f853a8487c83a1b9e150b7dcf3 note possible BE/LE mode needed for memory reads/writes --- diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py index f76afdab..4c2cfd83 100644 --- a/src/soc/decoder/isa/caller.py +++ b/src/soc/decoder/isa/caller.py @@ -51,6 +51,9 @@ class Mem: def _get_shifter_mask(self, wid, remainder): shifter = ((self.bytes_per_word - wid) - remainder) * \ 8 # bits per byte + # XXX https://bugs.libre-soc.org/show_bug.cgi?id=377 + # BE/LE mode? + # shifter = remainder * 8 mask = (1 << (wid * 8)) - 1 print ("width,rem,shift,mask", wid, remainder, hex(shifter), hex(mask)) return shifter, mask