From: Michael Nolan <mtnolan2640@gmail.com>
Date: Fri, 15 May 2020 16:52:33 +0000 (-0400)
Subject: Ooops, actually assert during cmpeqb
X-Git-Tag: div_pipeline~1192
X-Git-Url: https://git.libre-soc.org/?p=soc.git;a=commitdiff_plain;h=7f2bb98313f7f687bc050ca14be39525c95d8bb6

Ooops, actually assert during cmpeqb
---

diff --git a/src/soc/decoder/isa/test_caller.py b/src/soc/decoder/isa/test_caller.py
index 19bff96a..a8ddc3fe 100644
--- a/src/soc/decoder/isa/test_caller.py
+++ b/src/soc/decoder/isa/test_caller.py
@@ -274,6 +274,10 @@ class DecoderTestCase(FHDLTestCase):
         initial_regs[3] = 0x10
         with Program(lst) as program:
             sim = self.run_tst_program(program, initial_regs)
+            self.assertEqual(sim.crl[0].get_range().value,
+                             SelectableInt(4, 4))
+            self.assertEqual(sim.crl[1].get_range().value,
+                             SelectableInt(0, 4))