add OP_SC
[soc.git] / src / soc / config /
2020-06-29 Luke Kenneth Casso... fetch instructions from bare wishbone fetch unit
2020-06-28 Luke Kenneth Casso... add Config Fetch interface and quick unit test
2020-06-27 Luke Kenneth Casso... unit test in l0_cache to connect to testpi and test_bare_wb
2020-06-27 Luke Kenneth Casso... fix TestMemLoadStoreUnit, it required a FSM to monitor...
2020-06-27 Luke Kenneth Casso... add wishbone Pi2LSUI test
2020-06-27 Luke Kenneth Casso... reconfigureable PortInterface testing now possible
2020-06-26 Luke Kenneth Casso... load/store unit test needed to wait for busy_o
2020-06-26 Luke Kenneth Casso... investigating why write-enable not getting passed through
2020-06-26 Luke Kenneth Casso... whoops forgot to call parent elaborate
2020-06-26 Luke Kenneth Casso... add test of SRAM through wishbone bus
2020-06-26 Luke Kenneth Casso... code-morph which redirects lsmem unit test through...
2020-06-26 Luke Kenneth Casso... add a test SRAM that lives behind a minerva LoadStoreUn...
2020-06-26 Luke Kenneth Casso... add reconfigureable Load/Store class