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JTAG boundary scan test 1st attempt
[soc.git]
/
src
/
soc
/
debug
/
jtag.py
2020-10-08
Luke Kenneth Casso...
JTAG boundary scan test 1st attempt
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2020-10-08
Luke Kenneth Casso...
rework jtag test to use JTAG class not DMITAP
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2020-10-04
Luke Kenneth Casso...
significant reorg of the litex pinspecs to use pinmux...
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2020-10-03
Luke Kenneth Casso...
allow i2c to be routed via JTAG
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2020-10-03
Luke Kenneth Casso...
minor reorg on JTAG, allow alternative pinset dict...
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2020-09-28
Luke Kenneth Casso...
lots of sorting out iopads
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2020-09-24
Luke Kenneth Casso...
add comments
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2020-09-24
Luke Kenneth Casso...
c4m iopad integration working
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2020-09-24
Luke Kenneth Casso...
add jtag c4m pins which gives us a way to connect IO...
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2020-09-22
Luke Kenneth Casso...
add jtag interface to issuer_verilog
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2020-09-22
Luke Kenneth Casso...
add JTAG bus module
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