git.libre-soc.org Git - soc.git/history - src/soc/decoder/decode2execute1.py

2020-07-12	Luke Kenneth Casso...	rename InternalOp to MicrOp	blob \| commitdiff \| raw
2020-07-12	Luke Kenneth Casso...	change CSV LD/ST update field to LDSTMode (support...	blob \| commitdiff \| raw \| diff to current
2020-07-08	Jacob Lifshay	Merge branch 'master' of ssh://git.libre-riscv.org...	blob \| commitdiff \| raw \| diff to current
2020-07-05	Luke Kenneth Casso...	big reorg on PowerDecoder2, actually Decode2Execute1Type	blob \| commitdiff \| raw \| diff to current
2020-07-05	Luke Kenneth Casso...	comment on spr2, not needed	blob \| commitdiff \| raw \| diff to current
2020-07-05	Luke Kenneth Casso...	split out Decode2ToExecuteType fields involving registers	blob \| commitdiff \| raw \| diff to current
2020-07-05	Luke Kenneth Casso...	sigh read and write xer detection, fix spr and trap...	blob \| commitdiff \| raw \| diff to current
2020-07-05	Luke Kenneth Casso...	move valid signal out of Decode2ToExecute1Type and...	blob \| commitdiff \| raw \| diff to current
2020-07-05	Luke Kenneth Casso...	remap SPR PowerISA numbers to internal SPR enum	blob \| commitdiff \| raw \| diff to current
2020-07-04	Luke Kenneth Casso...	cater for illegal instruction (generates a trap)	blob \| commitdiff \| raw \| diff to current
2020-06-17	Luke Kenneth Casso...	getting sim instruction decoder to reproduce asm instru...	blob \| commitdiff \| raw \| diff to current
2020-06-10	Luke Kenneth Casso...	move Decode2ToExecute1Type to separate module	blob \| commitdiff \| raw \| diff to current