Allow the formal engine to perform a same-cycle result in the ALU
[soc.git] / src / soc / decoder / formal /
2021-04-23 Luke Kenneth Casso... move over to from openpower imports
2020-08-24 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc
2020-08-22 Luke Kenneth Casso... rename invert_a to invert_in because logical inverts RB
2020-07-29 Jacob Lifshayadd __init__.py to all source directories
2020-07-12 Luke Kenneth Casso... rename InternalOp to MicrOp
2020-07-08 Jacob LifshayMerge branch 'master' of ssh://git.libre-riscv.org...
2020-07-04 Luke Kenneth Casso... whitespace
2020-06-04 Luke Kenneth Casso... use copy of FHDLTestCase
2020-03-30 Michael NolanFix tests broken by df295b5
2020-03-29 Michael NolanUpdate proof_decoder2 to handle signed immediates
2020-03-21 Luke Kenneth Casso... set bigendian=1 in formal proofs of decoder (TODO:...
2020-03-20 Michael NolanFix proof_decoder2
2020-03-18 Michael NolanAdd proof that all other opcodes decode to INVALID
2020-03-18 Michael NolanAdd more to decoder proof
2020-03-18 Michael NolanBegin adding proof for decoder stage 1
2020-03-11 Michael NolanAdd assertions that instruction fields are correct
2020-03-11 Michael NolanAdd test for remaining bits
2020-03-11 Michael NolanAdd tests for DecodeOut and DecodeRC
2020-03-10 Michael NolanAdd cases for DecodeB and DecodeC
2020-03-10 Michael NolanRefactor DecodeA test
2020-03-10 Michael NolanAdd proof for power_decoder2.DecodeA
2020-03-09 Michael NolanBegin adding proof for decoder2