2020-09-02 |
Luke Kenneth Casso... | series of extensive modifications to fix long-standing... |
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2020-08-27 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
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2020-08-27 |
Luke Kenneth Casso... | really bad hack to fix simulator bug in carry handling |
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2020-08-24 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
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2020-08-22 |
Luke Kenneth Casso... | rename invert_a to invert_in because logical inverts RB |
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2020-08-17 |
Luke Kenneth Casso... | turn SelectableInt less/greater into signed versions. |
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2020-08-14 |
Luke Kenneth Casso... | bad hack to get HSRR0/1 to be "same" as SRR0/1 |
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2020-08-04 |
Luke Kenneth Casso... | tracked down byte-reversal in LDST ISACaller and LDSTCo... |
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2020-08-04 |
Luke Kenneth Casso... | whitespace after autopep8 messed up |
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2020-08-04 |
Luke Kenneth Casso... | msr and pc moved to "state" in PowerDecode2 |
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2020-08-01 |
Luke Kenneth Casso... | add quick test of litex bios IMM64 macro |
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2020-07-25 |
Luke Kenneth Casso... | hilarious. only just caught a bug where overflow was... |
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2020-07-24 |
Luke Kenneth Casso... | annoying, yet more typos |
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2020-07-24 |
Luke Kenneth Casso... | annoying, typo |
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2020-07-24 |
Luke Kenneth Casso... | better debug assert log message |
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2020-07-24 |
Luke Kenneth Casso... | restore modification to caller.py from reversion of... |
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2020-07-24 |
Luke Kenneth Casso... | Revert "working on div's test_pipe_caller" |
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2020-07-24 |
Jacob Lifshay | working on div's test_pipe_caller |
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2020-07-22 |
Jacob Lifshay | Merge remote-tracking branch 'origin/master' |
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2020-07-22 |
Jacob Lifshay | format code |
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2020-07-22 |
Luke Kenneth Casso... | set additional MSR bits according to v3.0B spec when... |
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2020-07-22 |
Luke Kenneth Casso... | use (new) MSRb and PIb which has auto-bigendian numbers |
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2020-07-21 |
Luke Kenneth Casso... | convert branch pipeline to use msr/cia as immediates |
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2020-07-21 |
Luke Kenneth Casso... | set ISACaller.msr rather than namespace[MSR] |
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2020-07-21 |
Luke Kenneth Casso... | add msr exception bits setting function in hardware |
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2020-07-16 |
Luke Kenneth Casso... | get trap compunit test working, adding bigendian and msr |
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2020-07-15 |
Luke Kenneth Casso... | whoops forgot to update PC after trap in ISACaller |
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2020-07-14 |
Luke Kenneth Casso... | attempting to access self.msr directly |
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2020-07-14 |
Luke Kenneth Casso... | add priv instruction checking to ISACaller simulator |
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2020-07-12 |
Luke Kenneth Casso... | rename InternalOp to MicrOp |
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2020-07-11 |
Luke Kenneth Casso... | sorting out bigendian/littleendian including in qemu |
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2020-07-11 |
Luke Kenneth Casso... | special test for mul hw to cope with ignoring OE flag |
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2020-07-10 |
Luke Kenneth Casso... | add a DIVS function as separate and discrete from floor_div |
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2020-07-10 |
Luke Kenneth Casso... | check for div_overflow equal to None rather than == 1 |
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2020-07-09 |
Luke Kenneth Casso... | debug information related to 32/64 bit mode |
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2020-07-09 |
Luke Kenneth Casso... | identifying locations where big/little endian is in... |
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2020-07-08 |
Luke Kenneth Casso... | stashing current state of investigation whilst looking... |
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2020-07-08 |
Jacob Lifshay | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2020-07-07 |
Luke Kenneth Casso... | ordering of tests for OP_ATTN needed shuffling. seems... |
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2020-07-07 |
Luke Kenneth Casso... | add halted condition in ISACaller, when attn instructio... |
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2020-07-05 |
Luke Kenneth Casso... | add mtmsr tests (fail) |
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2020-07-05 |
Luke Kenneth Casso... | add an illegal instruction trap test |
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2020-07-05 |
Luke Kenneth Casso... | big reorg on PowerDecoder2, actually Decode2Execute1Type |
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2020-07-05 |
Luke Kenneth Casso... | missing initialisation of disasm_start |
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2020-07-05 |
Luke Kenneth Casso... | fix qemu trap test |
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2020-07-04 |
Luke Kenneth Casso... | use new consts module |
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2020-07-04 |
Luke Kenneth Casso... | sorting out trap fastregs |
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2020-07-04 |
Luke Kenneth Casso... | resolve spr names in ISACaller |
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2020-07-04 |
Luke Kenneth Casso... | debugging decoding of SPRs (fast) |
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2020-07-01 |
Luke Kenneth Casso... | whoops missed some cases in unit test changing ALUHelpers |
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2020-07-01 |
Luke Kenneth Casso... | print out msr for debug |
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2020-07-01 |
Luke Kenneth Casso... | attempting to add SPRs to rfid test |
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2020-06-29 |
Luke Kenneth Casso... | update OV and OV32 ISACaller flags if overflow occurs |
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2020-06-29 |
Luke Kenneth Casso... | attempting to add overflow setting in ISACaller |
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2020-06-20 |
colepoirier | Add code, commented-out, for TRAP so as to not break... |
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2020-06-19 |
Luke Kenneth Casso... | add trunc_div and trunch_rem to decoder helpers |
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2020-06-19 |
Luke Kenneth Casso... | bit of a mess. getting carry recognised and output... |
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2020-06-18 |
Jacob Lifshay | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2020-06-18 |
Luke Kenneth Casso... | investigating mtocrf/mtcrf issue |
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2020-06-17 |
Luke Kenneth Casso... | add bug reference to mtocrf/mtcrf name decoding |
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2020-06-17 |
Luke Kenneth Casso... | decoding assembly instruction name, move to separate... |
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2020-06-17 |
Luke Kenneth Casso... | getting sim instruction decoder to reproduce asm instru... |
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2020-06-17 |
Luke Kenneth Casso... | update test_sim.py to do a simple execution loop: decod... |
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2020-06-17 |
Luke Kenneth Casso... | get fu compunit test to use ISACaller instruction-memory |
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2020-06-17 |
Luke Kenneth Casso... | split execute and setup of ISACaller instruction execution |
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2020-06-17 |
Luke Kenneth Casso... | comment ISACaller setup |
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2020-06-17 |
Luke Kenneth Casso... | start to add in independent execution into ISACaller |
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2020-06-17 |
Luke Kenneth Casso... | add a fake program counter to ISACaller |
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2020-06-17 |
Luke Kenneth Casso... | add "respect_pc" boolean to ISACaller |
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2020-06-17 |
Luke Kenneth Casso... | add optional instruction memory |
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2020-06-17 |
Luke Kenneth Casso... | got test_issuer FSM operating. bit of a hack |
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2020-06-14 |
Luke Kenneth Casso... | reasonably certain that the careful and slow use of... |
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2020-06-12 |
Luke Kenneth Casso... | note possible BE/LE mode needed for memory reads/writes |
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2020-06-12 |
Luke Kenneth Casso... | tracking down what looks like an error in the Simulator... |
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2020-06-08 |
Luke Kenneth Casso... | add comment docstring about POWER9 simulator |
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2020-06-08 |
Luke Kenneth Casso... | whoops, overflow-decode (handle_overflow) needed to... |
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2020-06-08 |
Luke Kenneth Casso... | check that carry has already been done or not by the... |
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2020-06-08 |
Luke Kenneth Casso... | copy 64-bit OV, try creating 32-bit OV32 in |
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2020-06-07 |
Luke Kenneth Casso... | update comments |
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2020-06-07 |
Luke Kenneth Casso... | ha! set XER CA/CA32 in simulator from output.value... |
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2020-06-07 |
Luke Kenneth Casso... | optionally writing out CA/CA32 to XER |
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2020-06-07 |
Luke Kenneth Casso... | add handling of CA/CA32 in simulator, generated from... |
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2020-06-07 |
Luke Kenneth Casso... | docstring on caller.py inject() decorator |
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2020-06-07 |
Luke Kenneth Casso... | add TRAP function, stub |
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2020-06-07 |
Luke Kenneth Casso... | add MSR to simulator context |
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2020-06-06 |
Luke Kenneth Casso... | experimenting with setting up and testing memory |
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2020-06-06 |
Luke Kenneth Casso... | shift-mask in Simulator Mem class not quite right |
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2020-06-06 |
Luke Kenneth Casso... | allow Mem in Simulator to be initialised |
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2020-05-21 |
Michael Nolan | Fix broken unit tests in test_caller |
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2020-05-21 |
Michael Nolan | Fix broken test_adde/add overflow handling to caller.py |
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2020-05-19 |
Michael Nolan | Fix weird edge cases with carry |
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2020-05-19 |
Michael Nolan | Add ca32 to caller.py |
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2020-05-19 |
Michael Nolan | Handle carry in caller.py |
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2020-05-16 |
Michael Nolan | Get working mcrf in caller.py |
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2020-05-15 |
Michael Nolan | Add ability to specify initial CR state |
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2020-05-15 |
Michael Nolan | Implement relative branches, add explicit NIA input... |
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2020-05-15 |
Michael Nolan | Add test for popcnt to test_caller.py |
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2020-05-14 |
Luke Kenneth Casso... | simplify popcount |
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2020-05-13 |
Michael Nolan | Update TODO |
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2020-05-11 |
Michael Nolan | Add ability to specify initial state for SPRs |
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