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[soc.git] / src / soc / decoder / power_decoder2.py
2021-04-23 Luke Kenneth Casso... moving more over to openpower-isa repo
2021-03-30 Alain D D WilliamsMerge branch 'master' of git.libre-soc.org:soc
2021-03-28 Luke Kenneth Casso... rather invasive reduction of SPR regfile size
2021-03-18 Luke Kenneth Casso... add sv_out2 to PowerDecode and PowerDecoder2
2021-03-17 Luke Kenneth Casso... add SVP64 dststep incrementing in PowerDecoder2, Testis...
2021-03-17 Luke Kenneth Casso... link up SVP64 RM Mode decoding into PowerDecoder2
2021-03-17 Luke Kenneth Casso... add in SVP64 RM Mode decoder
2021-03-12 Luke Kenneth Casso... add more sophisticated checking of whether SVP64 loop...
2021-03-11 Luke Kenneth Casso... add detection of whether *full* 7-bit of RA is zero...
2021-03-08 Luke Kenneth Casso... actually make it possible to disable svp64 on commandli...
2021-03-08 Luke Kenneth Casso... add option to cut out SVP64 from PowerDecoder2
2021-03-04 Luke Kenneth Casso... whoops microwatt already allocates SPR 720
2021-03-02 Luke Kenneth Casso... operating correctly, not directing MMU SPRs to SPR...
2021-03-01 Luke Kenneth Casso... Revert "fix Bug 607 - unnecessary code added related...
2021-02-28 Luke Kenneth Casso... move SVP64 Extra decoders to separate module
2021-02-28 Luke Kenneth Casso... fix syntax error
2021-02-28 Luke Kenneth Casso... move SVP64PrefixDecoder to separate module
2021-02-28 Luke Kenneth Casso... add PowerDecoder.no_in_vec
2021-02-28 Tobias Platenfix Bug 607 - unnecessary code added related to MMU...
2021-02-28 Tobias Platenfix Bug 603 - use SPR names/numbers from sprs.csv
2021-02-24 Luke Kenneth Casso... add comments explaining split
2021-02-24 Luke Kenneth Casso... move DecodeCROut/In (at last) out of PowerDecoderSubset...
2021-02-24 Luke Kenneth Casso... start making write_cr0 independent of DecodeCROut
2021-02-22 Cesar StraussFix typo when calculating PowerDecoder2.no_out_vec
2021-02-21 Luke Kenneth Casso... add CR out vector detection to PowerDecoder2 no_out_vec
2021-02-21 Cesar StraussThe new version of "sel" is smart enough to find a...
2021-02-21 Cesar StraussUse the new selection field function from nmutil
2021-02-21 Luke Kenneth Casso... create SVP64CROffs consts for when SVP64 Vector-of...
2021-02-20 Luke Kenneth Casso... add in Vectorised CRs when Rc=1 into ISACaller
2021-02-20 Luke Kenneth Casso... add CR1 to DecodeCRIn/Out
2021-02-20 Luke Kenneth Casso... add some debug checking to get_pdecode_cr_out
2021-02-20 Luke Kenneth Casso... add crossreference to bug #603
2021-02-20 Cesar StraussFix more MSB0 issues in comments
2021-02-20 Cesar StraussReplace more hardcoded constants with symbolic field...
2021-02-20 Luke Kenneth Casso... increment CRs based on srcstep, see what happens
2021-02-17 Cesar StraussUse subfield bit selection to extract the RM SVP64...
2021-02-17 Cesar StraussReplace MSB-i by symbolic subfield indices and selectors
2021-02-16 Cesar StraussFix MSB0 issues for SVP64
2021-02-16 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-02-16 Luke Kenneth Casso... add indicator to PowerDecoder2 when no outputs are...
2021-02-15 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-02-14 Cesar StraussFix width of the "extra" input on the Extra decoder
2021-02-14 Cesar StraussFix conversion to MSB0
2021-02-14 Luke Kenneth Casso... add srcstep onto Vectorised GPRs in PowerDecoder2
2021-02-13 Tobias PlatenOP_TLBIE must in be instr_is_priv
2021-02-13 Tobias Platenkeep commits to under 80 chars
2021-02-13 Tobias Platenforward microwatt mmu specific SPR: PID and PRTBL
2021-02-11 Luke Kenneth Casso... comments in TestIssuer for SVP64PrefixDecoder
2021-02-04 Tobias Platenpass SPR MicroOp to MMU function unit
2021-02-03 Luke Kenneth Casso... nope - need it to be zero if not identified as svp64
2021-02-03 Luke Kenneth Casso... actually no need to mux in the svp64_rm, just the id...
2021-02-03 Luke Kenneth Casso... add SVP64PowerDecoder, extracts svp64 remap if correctl...
2021-01-31 Luke Kenneth Casso... remove sv_rm from PowerDecoder register decoders
2021-01-31 Luke Kenneth Casso... move SVP64 Extra reg decoding into main PowerDecoder...
2021-01-30 Luke Kenneth Casso... move CR in/out SVP64 EXTRA decoders into PowerDecoder
2021-01-30 Luke Kenneth Casso... add SVP64 CR out extending to 7-bit in PowerDecoder2
2021-01-30 Luke Kenneth Casso... add SVP64 CR EXTRA field-extension, from 3-bit to 7...
2021-01-30 Luke Kenneth Casso... extend CR registers in Decode2ToExecute1Type to 7 bit
2021-01-30 Luke Kenneth Casso... add SVP64CRExtra class to PowerDecoder2, turns 3-bit...
2021-01-30 Luke Kenneth Casso... split out SVEXTRA field selection/decoding into separat...
2021-01-30 Luke Kenneth Casso... whoops update PowerDecoder2 svp64 comments, reg sizes...
2021-01-30 Luke Kenneth Casso... add SVP64 EXTRA decoding to RB, RC and RT (out) in...
2021-01-30 Luke Kenneth Casso... add first SVP64 7-bit register context decoder to Power...
2021-01-29 Luke Kenneth Casso... add SVP64RM record to PowerDecoder2
2021-01-29 Luke Kenneth Casso... adjust how register copy/setup is done in PowerDecoder2
2021-01-27 Tobias Platenuse SPR constants
2021-01-27 Luke Kenneth Casso... whitespace and shortening of SPR MMU redirection in...
2021-01-26 Tobias Platen[Bug 580] update comment above changed block
2021-01-26 Tobias Platen[Bug 580] redirect MMU SPRs to the MMU
2020-10-06 Luke Kenneth Casso... comments
2020-10-06 Luke Kenneth Casso... skip Decode2ToOperand from PowerDecodeSubset
2020-10-06 Luke Kenneth Casso... comment SRR1 mem.exception
2020-10-06 Luke Kenneth Casso... add SRR1 setting for LDST memory exception trap
2020-10-06 Luke Kenneth Casso... passing LDSTException over to Trap Pipeline
2020-10-06 Luke Kenneth Casso... add LDSTException decode/handling in PowerDecoder2
2020-09-26 Luke Kenneth Casso... fix annoying alu test_pipe_caller bug, missing asmcode
2020-09-26 Luke Kenneth Casso... make check of LDSTMode.update conditional in PowerDecoder2
2020-09-08 Luke Kenneth Casso... subset columns for PowerDecoder - bit of a mess (done...
2020-09-08 Luke Kenneth Casso... create a special subset of Decoder Record for storing...
2020-09-08 Luke Kenneth Casso... argh, somehow EINT check got moved out of if/elif block
2020-09-08 Luke Kenneth Casso... capture trap / irq conditions in flags for debug purposes
2020-09-08 Luke Kenneth Casso... pass in CoreState to PowerDecoder rather than eq a...
2020-09-08 Luke Kenneth Casso... whoops trap address being set in wrong Decode2ExecuteTy...
2020-09-07 Luke Kenneth Casso... use PowerDecoderSubsets for FUs, except for TRAP which...
2020-09-07 Luke Kenneth Casso... make immediate decoding optional on-demand
2020-09-07 Luke Kenneth Casso... bit of a big reorg of data structures
2020-09-07 Luke Kenneth Casso... split out PowerDecode2 into PowerDecodeSubset
2020-09-07 Luke Kenneth Casso... minor reorg on PowerDecoder
2020-09-06 Luke Kenneth Casso... decoder immediate b split out to DecodeBImm
2020-09-06 Luke Kenneth Casso... decoder immediate a split out to DecodeAImm
2020-09-06 Luke Kenneth Casso... minor code-munge on SPR-to-FAST mapping
2020-09-06 Luke Kenneth Casso... add comments for DEC / TB
2020-09-06 Luke Kenneth Casso... move DEC and TB from StateRegs to FastRegs for several...
2020-09-06 Luke Kenneth Casso... add DEC SPR to CoreState and PowerDecoder, activate...
2020-09-04 Luke Kenneth Casso... adding option to include XICS external interrupts.
2020-09-02 Luke Kenneth Casso... when mtocrf FXM is 0, the CR has to be set to CR7
2020-09-02 Luke Kenneth Casso... series of extensive modifications to fix long-standing...
2020-08-31 Luke Kenneth Casso... add XER to fastregs and "construct" it in mfspr/mtspr
2020-08-30 Luke Kenneth Casso... reversal of FXM mask for one-hot selection in OP_MTCR...
2020-08-29 Luke Kenneth Casso... slowly morphing towards using an XER bit-field selector...
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