radix: reading first page table entry
[soc.git] / src / soc / decoder / power_enums.py
2021-02-28 Luke Kenneth Casso... start on SVP64 RM Mode decoder
2021-02-28 Luke Kenneth Casso... more SVP64 enums
2021-02-28 Luke Kenneth Casso... add SVP64 RM sub-field enums
2021-01-31 Luke Kenneth Casso... update submodule
2021-01-29 Luke Kenneth Casso... adjust SVP64RM class to output more PowerDecoder-friend...
2021-01-29 Luke Kenneth Casso... start adding svp64 enums
2021-01-23 Luke Kenneth Casso... start to read RM CSV files
2020-12-28 Luke Kenneth Casso... add CR1 to power_enums
2020-09-15 Luke Kenneth Casso... add MMU FunctionUnit
2020-09-15 Luke Kenneth Casso... add OP_TLBIE
2020-09-07 Luke Kenneth Casso... split out PowerDecode2 into PowerDecodeSubset
2020-09-05 Luke Kenneth Casso... add stbcix and lwzcix to power_enum list
2020-08-17 Luke Kenneth Casso... turn SelectableInt less/greater into signed versions.
2020-08-14 Luke Kenneth Casso... update submodule, add hrfid
2020-07-22 Jacob LifshayMerge remote-tracking branch 'origin/master'
2020-07-22 Jacob Lifshayformat code
2020-07-15 Luke Kenneth Casso... add cache cx to LDSTMode
2020-07-12 Luke Kenneth Casso... rename InternalOp to MicrOp
2020-07-12 Luke Kenneth Casso... modify PowerDecoder to read LDSTMode correctly
2020-07-12 Luke Kenneth Casso... change CSV LD/ST update field to LDSTMode (support...
2020-07-08 Jacob LifshayMerge branch 'master' of ssh://git.libre-riscv.org...
2020-07-06 Luke Kenneth Casso... add mtmsr internal op
2020-07-04 Luke Kenneth Casso... sorting out fast/spr naming
2020-07-04 Luke Kenneth Casso... add spr test, add decode of spr in/out
2020-07-01 Luke Kenneth Casso... attempting to add SPRs to rfid test
2020-07-01 Luke Kenneth Casso... add OP_SC
2020-06-17 Luke Kenneth Casso... getting sim instruction decoder to reproduce asm instru...
2020-06-17 Luke Kenneth Casso... add comment/assembly decode in power enums
2020-06-09 Luke Kenneth Casso... map LDST len directly, rather than go through a switch...
2020-06-01 Luke Kenneth Casso... allow ALU / Logical ops to select RS as 1st operand
2020-06-01 Luke Kenneth Casso... allow M*-Form shiftrot to swap RS/RB back to consistent...
2020-06-01 Luke Kenneth Casso... decode SPRs for branch
2020-05-27 Luke Kenneth Casso... make power function unit enum bitmasked
2020-05-25 Luke Kenneth Casso... add INT, SPR and CR regfiles
2020-05-24 Luke Kenneth Casso... add MFMSR and MTMSRD enums to Function
2020-05-21 Michael NolanConvert CR out to enum in power_decoder
2020-05-21 Michael NolanConvert CR In field to enum instead of single bit
2020-05-20 Luke Kenneth Casso... add DIV and MUL to POWER Function enum
2020-05-19 Luke Kenneth Casso... add OP_RFID to enums
2020-05-19 Michael NolanChange OP_TWI/TDI/TW/TD to OP_TRAP
2020-05-19 Luke Kenneth Casso... add TRAP FunctionUnit type
2020-05-15 Michael NolanMake opcode for crand and friends
2020-05-15 Michael NolanAdd CR function unit
2020-05-15 Michael NolanAdd rudimentary branch unit test bench
2020-05-14 Luke Kenneth Casso... add logical pipeline to Power decode Function enum
2020-05-13 Michael NolanAdd SHIFT_ROT FU
2020-05-07 Michael NolanGet test_cmp working
2020-05-06 Michael NolanAdd dict of spr properties to power_enums
2020-05-06 Michael NolanImplement bctr and mtspr
2020-05-04 Yehowshua ImmanuelRemove request since no longer https fetches from wiki
2020-05-02 Michael NolanRead decoder tables from wiki submodule instead of web
2020-04-05 Jacob Lifshayuse fields.txt as the local file name and add to gitignore
2020-03-18 Michael NolanFix bug where enum values weren't getting set to int
2020-03-18 Luke Kenneth Casso... done, bugs.libre-riscv.org/show_bug.cgi?id=261
2020-03-18 Michael NolanCreate SPR enum from sprs.csv
2020-03-18 Luke Kenneth Casso... add comment about SPRs CSV
2020-03-18 Luke Kenneth Casso... add comments
2020-03-09 Michael NolanFix test
2020-03-09 Luke Kenneth Casso... move all source directories to soc so that "import...