format code
[soc.git] / src / soc / experiment / alu_hier.py
2020-07-22 Jacob Lifshayformat code
2020-07-12 Luke Kenneth Casso... rename InternalOp to MicrOp
2020-07-08 Jacob LifshayMerge branch 'master' of ssh://git.libre-riscv.org...
2020-07-07 Cesar StraussClear input data along with valid_i
2020-07-06 Cesar StraussAssert n.ready_i at the beginning of the cycle
2020-07-06 Cesar StraussRemove wait state to demonstrate zero-delay reception.
2020-07-06 Cesar StraussSimplify waiting loops
2020-07-06 Cesar StraussFinally add some well needed comments
2020-07-06 Cesar StraussSimplify waiting loops
2020-07-06 Cesar StraussAdd some wait states in each process
2020-07-06 Cesar StraussNegate inputs after use
2020-07-06 Cesar StraussAdd other tests
2020-07-06 Cesar StraussImplement receiver
2020-07-06 Cesar StraussImplement sender.
2020-07-06 Cesar StraussBegin a new parallel test
2020-07-02 Cesar StraussPresent the ALU result only when valid_o is active
2020-06-28 Cesar StraussLet p.ready_o be active while the test ALU is idle
2020-06-28 Cesar StraussAdd missing ports to the test ALU
2020-06-09 Cesar StraussKeep the sequencer in the "done" state until ready_i...
2020-06-07 Cesar StraussAssign the one-clock delay operation from ADD to SHR
2020-06-07 Cesar StraussTry responding with ready_i on the same cycle as valid_o
2020-06-07 Cesar StraussAssert valid_o one clock early, as alu_done is asserted
2020-06-07 Cesar StraussMake the test ALU conform to the valid/ready protocol
2020-05-29 Luke Kenneth Casso... rename output signals in Test ALU
2020-05-28 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2020-05-28 Luke Kenneth Casso... add 3rd parameter to DummyALU
2020-05-26 Luke Kenneth Casso... get score6600_multi.py working again
2020-05-25 Michael NolanMinor changes to alu_hier.py to allow it to be used...
2020-05-24 Luke Kenneth Casso... hmm...
2020-05-24 Luke Kenneth Casso... add very rapid DummyALU for test purposes in MultiCompUnit
2020-05-23 Luke Kenneth Casso... make MultiCompUnit and testing ALU use regspec API...
2020-05-23 Luke Kenneth Casso... make demo/test ALU look like nmigen pipeline API
2020-05-20 Luke Kenneth Casso... fix a series of random imports
2020-05-08 Michael NolanSeparate out ALU Input record from alu_hier.py
2020-04-19 Luke Kenneth Casso... get compldst.py unit test up and running after modifica...
2020-04-19 Luke Kenneth Casso... convert BranchALU to temporary conformant API
2020-04-17 Jacob LifshayMerge branch 'master' of ssh://git.libre-riscv.org...
2020-04-14 Luke Kenneth Casso... turn experimental ALU into array-input
2020-04-10 Luke Kenneth Casso... eek, first cut at using POWER decoder2 in 6600 simulato...
2020-04-10 Luke Kenneth Casso... whoops syntax error
2020-04-10 Luke Kenneth Casso... converting InstructionQ to use Decode2ToExecuteType
2020-04-10 Luke Kenneth Casso... add eq_from_execute1 subset function
2020-04-09 Luke Kenneth Casso... get CompUnitALU test running with InternalOp ALU subset
2020-04-09 Luke Kenneth Casso... experiment morphing ALU to take subset of Decode2ToExecute1
2020-04-08 Luke Kenneth Casso... use power decoder InternalOp
2020-03-10 Luke Kenneth Casso... comments explaining what alu_hier.py does
2020-03-09 Luke Kenneth Casso... move all source directories to soc so that "import...