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Allow the formal engine to perform a same-cycle result in the ALU
[soc.git] / src / soc / experiment / icache.py
2022-07-06 Luke Kenneth Casso... add fabric compatibility mode commit | commitdiff
2022-06-26 Luke Kenneth Casso... reduce icache/dcache TLB sizes commit | commitdiff
2022-04-29 Luke Kenneth Casso... add option to set small cache sizes in commit | commitdiff
2022-04-16 Luke Kenneth Casso... reduce dcache/icache number of ways, to fit into ECP5... commit | commitdiff
2022-03-26 Luke Kenneth Casso... rename PLRU modules to avoid conflict in microwatt commit | commitdiff
2022-03-12 Luke Kenneth Casso... Revert "read last row from r.wb.adr not r.req_adr in... commit | commitdiff
2022-03-12 Luke Kenneth Casso... read last row from r.wb.adr not r.req_adr in icache commit | commitdiff
2022-03-08 Luke Kenneth Casso... remove stbs_done in icache.py commit | commitdiff
2022-02-27 Luke Kenneth Casso... for lulz make I-Cache possible to set to 32-bit (XLEN=32) commit | commitdiff
2022-02-20 Luke Kenneth Casso... add syn_ramstyle "block_ram" attributes and reduce... commit | commitdiff
2022-02-18 Luke Kenneth Casso... use block_ram attribute for FPGA synthesis commit | commitdiff
2022-02-18 Luke Kenneth Casso... couple of adjustments to reduce gate count in i/d-cache commit | commitdiff
2022-02-18 Luke Kenneth Casso... reduce TLB set size from 64 to 16 to get FPGA resource... commit | commitdiff
2022-02-18 Luke Kenneth Casso... drastically reduce I-Cache size in microwatt-compat... commit | commitdiff
2022-02-18 Luke Kenneth Casso... parameterise I-Cache similar to D-Cache. lots of "self." commit | commitdiff
2022-02-17 Luke Kenneth Casso... add opencores SDRAM verilog wrapper commit | commitdiff
2022-02-16 Luke Kenneth Casso... oof. big update to DCache to accept config parameters commit | commitdiff
2022-01-31 Luke Kenneth Casso... fix bug in itlb_valid SRLatch set/reset, a bit weird... commit | commitdiff
2022-01-31 Luke Kenneth Casso... whoops tlb_valids in ICache is a combinatorial-get/set commit | commitdiff
2022-01-31 Luke Kenneth Casso... convert TLBValidArray in ICache to SRLatch commit | commitdiff
2022-01-31 Luke Kenneth Casso... use an SRLatch for cache_valids, at least it reduces... commit | commitdiff
2022-01-31 Luke Kenneth Casso... use Memory for cache_tags in icache commit | commitdiff
2022-01-30 Luke Kenneth Casso... remove CacheTagArray in icache.py commit | commitdiff
2022-01-30 Luke Kenneth Casso... create Memory for Cache Tags in I-Cache commit | commitdiff
2022-01-30 Luke Kenneth Casso... remove unneeded parameter commit | commitdiff
2022-01-30 Luke Kenneth Casso... add Array of CacheValids back in, so as to reduce LUT4... commit | commitdiff
2022-01-30 Luke Kenneth Casso... tagset is a local Signal in ICache commit | commitdiff
2022-01-30 Luke Kenneth Casso... use nmigen Memory in I-Cache for TLB Lookups commit | commitdiff
2022-01-30 Luke Kenneth Casso... put itlb_valid back, ready for conversion to Memory... commit | commitdiff
2022-01-23 Luke Kenneth Casso... looked in soc.vhdl in microwatt and the parameters... commit | commitdiff
2022-01-06 Luke Kenneth Casso... double the number of lines in the L1 D/I-Cache to match... commit | commitdiff
2021-12-18 Luke Kenneth Casso... move connection of bus.stall in icache.py, commit | commitdiff
2021-12-18 Luke Kenneth Casso... tidyup commit | commitdiff
2021-12-18 Luke Kenneth Casso... tlb_req_index is TLB_BITS long not TLB_SIZE commit | commitdiff
2021-12-12 Luke Kenneth Casso... in a terrible botched way, get at I-Cache and set it up commit | commitdiff
2021-12-11 Luke Kenneth Casso... get FetchUnitInterface I-Cache test working (sort-of) commit | commitdiff
2021-12-11 Luke Kenneth Casso... connect up I-Cache to FetchUnitInterface commit | commitdiff
2021-12-07 Luke Kenneth Casso... whoops another serious error in the CacheTagArray commit | commitdiff
2021-12-07 Luke Kenneth Casso... add first i-cache fetch (non-virtual), no MMU lookup... commit | commitdiff
2021-12-07 Luke Kenneth Casso... add discussion links and bugreport commit | commitdiff
2021-12-06 Luke Kenneth Casso... PLRUs were selecting an output index, only one selected commit | commitdiff
2021-12-06 Luke Kenneth Casso... repeated copies of read/write addr/sel to Cache SRAMs commit | commitdiff
2021-12-06 Luke Kenneth Casso... move bank of PLRUs to their own submodule in both dcach... commit | commitdiff
2021-12-06 Luke Kenneth Casso... use one-hot binary-to-unary in dcache.py commit | commitdiff
2021-12-06 Luke Kenneth Casso... use i_in.req to gate hit_way via Decoder in icache.py commit | commitdiff
2021-12-06 Luke Kenneth Casso... use Decoder (binary-to-unary) in icache.py to deal... commit | commitdiff
2021-12-05 Luke Kenneth Casso... whitespace commit | commitdiff
2021-12-05 Luke Kenneth Casso... use Record for I-Cache Cache Tag/Valid commit | commitdiff
2021-12-05 Luke Kenneth Casso... whitespace commit | commitdiff
2021-12-05 Luke Kenneth Casso... use Record for ICache TLB commit | commitdiff
2021-12-05 Luke Kenneth Casso... convert icache.py to standard wishbone Interface commit | commitdiff
2021-12-05 Luke Kenneth Casso... fake up wishbone stall signal in icache. commit | commitdiff
2021-12-05 Luke Kenneth Casso... fix icache row store issue commit | commitdiff
2021-12-05 Luke Kenneth Casso... using same tag/row functions as in dcache.py commit | commitdiff
2021-12-05 Luke Kenneth Casso... more signal sizes in icache.py commit | commitdiff
2021-12-05 Luke Kenneth Casso... incorrect Signal sizes in icache.py, commit | commitdiff
2021-12-05 Luke Kenneth Casso... sorting out icache.py, used to work commit | commitdiff
2021-12-05 Luke Kenneth Casso... remove redundant code commit | commitdiff
2021-12-05 Luke Kenneth Casso... add I-Cache standard bus (not used yet) commit | commitdiff
2021-04-20 Luke Kenneth Casso... use soc.bus.sram instead of nmigen_soc.wishbone.sram commit | commitdiff
2021-02-07 colepoiriericache.py fix formatting commit | commitdiff
2020-12-13 Cesar StraussAllow more test cases to be run with CXXSim commit | commitdiff
2020-10-05 Cole Poiriericache.py fix ispow2() util fn per https://bugs.libre... commit | commitdiff
2020-10-05 Luke Kenneth Casso... whoops fix syntax error commit | commitdiff
2020-10-05 Luke Kenneth Casso... whoops fix syntax error commit | commitdiff
2020-10-05 Luke Kenneth Casso... return test rather than "if test return True else False" commit | commitdiff
2020-10-05 Luke Kenneth Casso... whitespace commit | commitdiff
2020-10-05 Luke Kenneth Casso... whitespace commit | commitdiff
2020-10-05 Cole Poiriericache.py add python asserts that were a TODO commented... commit | commitdiff
2020-10-05 Cole Poiriericache.py fix formatting, mostly due to reduced indenta... commit | commitdiff
2020-10-05 Cole Poiriericache.py remove comment that contained the entirety... commit | commitdiff
2020-10-05 Cole Poiriericache.py move icache_miss WAIT_ACK FSM state into... commit | commitdiff
2020-10-05 Cole Poiriericache.py move icache_miss CLR_TAG FSM state into metho... commit | commitdiff
2020-10-05 Cole Poiriericache.py move icache_miss IDLE FSM state into method... commit | commitdiff
2020-10-02 Cole Poiriericache.py add req_hit_way as arg to icache_comb, actual... commit | commitdiff
2020-10-01 Cole Poiriericache.py add missing comb signal assignments per https... commit | commitdiff
2020-10-01 Luke Kenneth Casso... revert bug in icache wishbone ack commit | commitdiff
2020-09-30 Luke Kenneth Casso... clean up row store and wb adr in icache commit | commitdiff
2020-09-30 Luke Kenneth Casso... hmm only set wishbone address if ack is actually received commit | commitdiff
2020-09-30 Luke Kenneth Casso... add more debug prints in icache commit | commitdiff
2020-09-30 Luke Kenneth Casso... remove more reviewed comments commit | commitdiff
2020-09-30 Luke Kenneth Casso... remove reviewed comments commit | commitdiff
2020-09-30 Luke Kenneth Casso... comb on wr_index not sync commit | commitdiff
2020-09-30 Luke Kenneth Casso... start removing reviewed comments commit | commitdiff
2020-09-30 Luke Kenneth Casso... use same constant name (confusing otherwise) commit | commitdiff
2020-09-30 Luke Kenneth Casso... need asserts commit | commitdiff
2020-09-30 Luke Kenneth Casso... halve the number of icache lines for now commit | commitdiff
2020-09-30 Luke Kenneth Casso... use Repl rather than for-loop to copy bit commit | commitdiff
2020-09-30 Luke Kenneth Casso... move loop invariant test out of loop commit | commitdiff
2020-09-30 Luke Kenneth Casso... reduce size of ilang file by a factor of FIVE commit | commitdiff
2020-09-30 Luke Kenneth Casso... store tag in temp signal commit | commitdiff
2020-09-30 Luke Kenneth Casso... reduce gate usage by getting cache row only not entire... commit | commitdiff
2020-09-30 Luke Kenneth Casso... fix read_tag to use word_select correctly commit | commitdiff
2020-09-30 Luke Kenneth Casso... forgot to add PLRUs as submodules commit | commitdiff
2020-09-29 Cole Poiriericache.py fix combinatorial loop with by testing temp... commit | commitdiff
2020-09-29 Cole Poiriericache.py fix is_last_row_addr, get_next_row_addr commit | commitdiff
2020-09-29 Cole Poiriericache.py trying to sort out test failure, added r... commit | commitdiff
2020-09-29 Cole Poiriericache.py fix test stbs_done signal, not stbs_zero... commit | commitdiff
2020-09-29 Cole Poiriericache.py fix rarange commit | commitdiff
2020-09-29 Cole Poiriericache.py fixed numerous bugs as specified by lkcl... commit | commitdiff
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