rename InternalOp to MicrOp
[soc.git] / src / soc / experiment / l0_cache.py
2020-07-12 Luke Kenneth Casso... rename InternalOp to MicrOp
2020-07-02 Luke Kenneth Casso... fix unit tests due to change in using pspec
2020-07-02 Luke Kenneth Casso... add bare wishbone option to TestIssuer, sort out ports
2020-07-02 Luke Kenneth Casso... use single-arg pspec for TestIssuer and Core
2020-06-28 Luke Kenneth Casso... read from instruction memory using FetchUnitInterface
2020-06-27 Luke Kenneth Casso... increase (double) address width in TstL0CacheBuffer
2020-06-27 Luke Kenneth Casso... unit test in l0_cache to connect to testpi and test_bare_wb
2020-06-27 Luke Kenneth Casso... make PortInterface modules consistent with same API
2020-06-27 Luke Kenneth Casso... use ConfigMemoryPortInterface in TstL0CacheBuffer
2020-06-22 Luke Kenneth Casso... remove unused module
2020-06-22 Luke Kenneth Casso... simplified L0CacheBuffer down to a "PortInterface Arbiter"
2020-06-22 Luke Kenneth Casso... add TestMemoryPortInterface class which is designed...
2020-06-22 Luke Kenneth Casso... remove CompLDSTOpSubset, replace with just data_len.
2020-06-22 Luke Kenneth Casso... move BE/LE byte-reverse into LDSTCompUnit
2020-06-19 Luke Kenneth Casso... add TODO comments to upgrade L0CacheBuffer to a new...
2020-06-14 Luke Kenneth Casso... add in byte-reverse from op PowerDecode2 field
2020-06-14 Luke Kenneth Casso... error in address width (truncated) in setting up L0Cach...
2020-06-14 Luke Kenneth Casso... error in naming that ended up in gtkwave from a proxy
2020-06-14 Luke Kenneth Casso... add byte-reversal on LD and ST in L0CacheBuffer
2020-06-11 Luke Kenneth Casso... some ugly hacks that get LD/ST immediate working
2020-06-10 Luke Kenneth Casso... wrong data structure being imported, duplicate CompLDST...
2020-06-10 Luke Kenneth Casso... expand LenExpand to 4 bits in order to cover 1/2/4...
2020-06-10 Luke Kenneth Casso... got L0CacheBuffer shift/mask working on a preliminary...
2020-06-10 Luke Kenneth Casso... whitespace
2020-06-10 Luke Kenneth Casso... add use of classes in L0Cache unit tests
2020-06-10 Luke Kenneth Casso... start using unittest suite in l0_cache.py
2020-06-10 Luke Kenneth Casso... add in LenExpander to L0CacheBuffer, not used yet
2020-06-10 Tobias Platenmake resetless for all signals in DataMergerRecord
2020-06-09 Luke Kenneth Casso... rename truncaddr to splitaddr, return LSBs and MSBs
2020-06-09 Luke Kenneth Casso... add len-expander to L0CacheBuffer, so as to be able...
2020-06-09 Tobias Platenundo code removed by commit 12297566322355ce5fed2e2a546...
2020-06-09 Tobias Platenelaborate function for DualPortSplitter
2020-06-09 Tobias Platenfixes for DualPortSplitter
2020-06-09 Luke Kenneth Casso... make DataMerger record reset_less
2020-06-09 Luke Kenneth Casso... add truncaddr function to L0CacheBuffer test class
2020-06-06 Luke Kenneth Casso... expand regwid to 64 in l0_cache test
2020-06-05 Luke Kenneth Casso... add comments and start of elaborate
2020-06-05 Tobias Platenimplement init function of DualPortSplitter
2020-06-05 Tobias Platenuncomment rtlil.convert in test_l0_cache that causes...
2020-05-30 Luke Kenneth Casso... add in use of "Settle"
2020-05-30 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2020-05-30 Tobias Platenunit test for DataMerger
2020-05-29 Tobias Platenfixes for DataMerger
2020-05-29 Tobias PlatenDataMerger: rename addr_match_i to addr_array_i
2020-05-29 Tobias Platenfixed 'return m is missing'
2020-05-29 Tobias Platenwhitespace fixes
2020-05-28 Tobias Platenindention
2020-05-28 Tobias Platenunittest for DataMerger
2020-05-28 Tobias Platenmore fixes for DataMerger
2020-05-28 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2020-05-28 Tobias Platenfixes for l0_cache.py
2020-05-27 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2020-05-27 Tobias Platenelaborate function for DataMerger
2020-05-25 Tobias Platenfix own copy/paste error
2020-05-25 Tobias Platenwhitespace fix in docstring
2020-05-25 Luke Kenneth Casso... argh! frickin MACos terminal expanded out to 86x30...
2020-05-25 Luke Kenneth Casso... add docstring
2020-05-25 Tobias Platenrefactoring (see #216 Comment 43)
2020-05-25 Tobias Platenwhitespace changes
2020-05-25 Tobias Platenimplement DataMerger interface
2020-05-24 Cesar StraussRename the internal DFF of latchregisters to avoid...
2020-05-23 Luke Kenneth Casso... add stub DataMerger class
2020-05-08 Luke Kenneth Casso... send address to memory only for one cycle and acknowled...
2020-05-08 Luke Kenneth Casso... prototype LD/ST L0 cache/buffer was bouncing address...
2020-05-06 Luke Kenneth Casso... mention need for DualPortSplitter class
2020-05-04 Luke Kenneth Casso... comments
2020-05-04 Luke Kenneth Casso... take out wait for busy in L0BufferCache tests
2020-05-04 Luke Kenneth Casso... whitespace cleanup
2020-05-04 Luke Kenneth Casso... bit of a mess, but functional. unit test passes on...
2020-05-04 Luke Kenneth Casso... hmmm trying to get st to acknowledge properly
2020-05-04 Luke Kenneth Casso... add links to bugreport and to memory/cache wiki page
2020-05-04 Luke Kenneth Casso... L0 cache/buffer first unit test, working except for...
2020-05-04 Luke Kenneth Casso... first cut at "basic" L0 Cache/Buffer (untested), only...
2020-05-04 Luke Kenneth Casso... document PortInterface, start on "dummy" L0CacheBuffer
2020-04-27 Luke Kenneth Casso... add LDST PortInterface class