Allow the formal engine to perform a same-cycle result in the ALU
[soc.git] / src / soc / experiment / test / test_loadstore1.py
2022-01-28 Luke Kenneth Casso... sort out misaligned store in LoadStore1
2022-01-08 Luke Kenneth Casso... fix MMU lookup after 2nd request (misaligned) by also...
2022-01-08 Luke Kenneth Casso... add microwatt mmu.bin test5 to show page-fault on misal...
2022-01-08 Luke Kenneth Casso... enable microwatt mmu test2
2022-01-08 Luke Kenneth Casso... whitespace and use exc is None not exc == None
2022-01-08 Tobias Platenadd function test_pi_ld_misalign
2022-01-07 Tobias Platenbegin testcase for misalign
2022-01-07 Luke Kenneth Casso... whitespace
2021-12-25 Luke Kenneth Casso... add mmu.bin test2 to much simpler test_loadstore1.py
2021-12-25 Luke Kenneth Casso... move msr in test_loadstore1.py outside of conditional...
2021-12-25 Luke Kenneth Casso... whitespace
2021-12-14 Tobias Platentest_loadstore1.py: test_loadstore1_ifetch_multi now...
2021-12-14 Tobias Platenfix test_loadstore1_ifetch_multi() in test_loadstore1.py
2021-12-14 Tobias Platenwip test case for virtual address fetch using fetch...
2021-12-14 Tobias Platenfix test_loadstore1_ifetch_multi()
2021-12-13 Tobias Platentry to get multi test running
2021-12-13 Tobias Platencomments about test_loadstore1_ifetch()
2021-12-13 Luke Kenneth Casso... fix test_loadstore1.py with MSR=PR/DR
2021-12-13 Luke Kenneth Casso... add in missing MSRSpec import
2021-12-13 Luke Kenneth Casso... commented-out code
2021-12-13 Luke Kenneth Casso... pass in new MSRSpec to test_loadstore1.py not msr_pr=1
2021-12-13 Tobias Platenmore work on test_loadstore1_ifetch_multi()
2021-12-11 Luke Kenneth Casso... fix bug in unit test, forgot that wb_get mem dict is...
2021-12-11 Luke Kenneth Casso... get FetchUnitInterface I-Cache test working (sort-of)
2021-12-11 Luke Kenneth Casso... comment out broken test
2021-12-11 Tobias Platentypo fix, add missing stop statement to _test_loadstore...
2021-12-11 Tobias Platenadd loop with multiple instructions for testing
2021-12-11 Tobias Platenadd skeleton for test_loadstore1_ifetch_multi()
2021-12-11 Luke Kenneth Casso... add start of test_loadstore1_ifetch_unit_interface()
2021-12-10 Tobias Platenuse icache_read in one place
2021-12-10 Tobias Platentest_loadstore1.py: begin code deduplication
2021-12-09 Luke Kenneth Casso... add some examination of the failed-fetched instruction
2021-12-09 Luke Kenneth Casso... add some debug string info to gtkwave
2021-12-09 Tobias Platenimplement main part of test_loadstore1_ifetch_invalid()
2021-12-09 Tobias Platencleanup test_loadstore1.py
2021-12-08 Luke Kenneth Casso... add special pagetable to ifetch_invalid with execute...
2021-12-08 Luke Kenneth Casso... do not try priv_mode on the instruction fetch (not...
2021-12-08 Tobias Platenbegin working on _test_loadstore1_ifetch_invalid()...
2021-12-08 Tobias Platenmore work on test_loadstore1_ifetch_invalid()
2021-12-08 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-12-08 Tobias Platenadd skeleton for test_loadstore1_ifetch_invalid()
2021-12-08 Luke Kenneth Casso... check that no exception occurs in the virtual-memory...
2021-12-08 Luke Kenneth Casso... make LoadStore1 intsr_fault a "captured flag" - strictl...
2021-12-08 Luke Kenneth Casso... add instr_fault to LoadStore1 FSM
2021-12-07 Luke Kenneth Casso... complete the i-cache fetch through the MMU, including...
2021-12-07 Luke Kenneth Casso... set separate "iside" signal in LoadStore1 to not confuse it
2021-12-07 Luke Kenneth Casso... start extending icache loadstore test
2021-12-07 Luke Kenneth Casso... add first i-cache fetch (non-virtual), no MMU lookup...
2021-12-07 Luke Kenneth Casso... code-comments
2021-12-07 Luke Kenneth Casso... add in I-Cache into LoadStore1 - presently unused ...
2021-12-05 Luke Kenneth Casso... wishbone bus convert on dcache
2021-12-04 Luke Kenneth Casso... should not have been duplicating wb_get function in...
2021-12-04 Luke Kenneth Casso... remove DAR from PortInterface (where is the data going...
2021-12-04 Luke Kenneth Casso... stop using dar_o from PortInterface, get DAR directly...
2021-12-03 Luke Kenneth Casso... fix up test_loadstore1.py
2021-12-02 Tobias Platenfix test_random in test_loadstore1
2021-11-30 Tobias Platenrandom loadstore1 test: readback written data
2021-11-30 Tobias Platenreenable dcbz test case
2021-11-30 Tobias Platencleanup test_loadstore1.py
2021-11-30 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-11-28 Tobias Platenupdate loadstore1 testcase
2021-11-27 Tobias Platenloadstore testcase: read at random addresses
2021-11-25 Tobias Platenseperate invalid test case from other test cases
2021-11-25 Tobias Platenadd testcase for invalid pagetable
2021-11-23 Tobias Platenfix test_loadstore1.py
2021-11-22 Tobias Platenadd store testcase
2021-11-20 Tobias Platenfix pi_ld testcase
2021-11-19 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-11-18 Tobias Platenmore work on test_loadstore1
2021-11-16 Tobias Platenpi_ld busy waiting fix
2021-11-16 Tobias Platenloadstore1 now reports exception reason
2021-11-15 Tobias Platenreport dar on exception + test case
2021-11-15 Tobias Platenadd test_loadstore1.py