move unused directory out of src, to indicate "ignore completely"
[soc.git] / src / soc / fu / alu / formal / proof_main_stage.py
2021-04-23 Luke Kenneth Casso... move over to from openpower imports
2020-07-15 Luke Kenneth Casso... use Record Assert and also check muxid
2020-07-12 Luke Kenneth Casso... rename InternalOp to MicrOp
2020-06-04 Luke Kenneth Casso... use copy of FHDLTestCase
2020-05-31 Luke Kenneth Casso... OP_CMPEQB also requesting change of output reg (stop...
2020-05-31 Luke Kenneth Casso... OP_CMP is requesting a change of the output register...
2020-05-27 Luke Kenneth Casso... check cr0, ov and ca ok signals in ALU main_stage proof
2020-05-27 Luke Kenneth Casso... add links to bugreports into ALu formal proof as well
2020-05-27 Luke Kenneth Casso... add links to bugreports into alu output stage proof
2020-05-27 Michael NolanFix bug in alu main stage proof
2020-05-24 Luke Kenneth Casso... convert ALU to output Data on int reg
2020-05-24 Luke Kenneth Casso... cleanup/code-munge on ALU main stage proof
2020-05-22 Luke Kenneth Casso... covert ALU FU to CommonInputStage
2020-05-20 Michael NolanUse overflow definition from microwatt
2020-05-20 Michael NolanAdd overflow handling and proof
2020-05-20 Michael NolanFix bug introduced in rebase
2020-05-20 Luke Kenneth Casso... update to new names for XER fields
2020-05-20 Luke Kenneth Casso... whitespace, rename ilang to alu_main_stage.il
2020-05-20 Michael NolanAdd proof for OP_CMP and OP_CMPEQB
2020-05-20 Michael NolanAdd proof for OP_EXTS
2020-05-20 Michael NolanAdd 32 bit carry handling to alu
2020-05-18 Luke Kenneth Casso... mass-rename of modules to soc.fu.*
2020-05-18 Luke Kenneth Casso... rename pipe to fu