Allow the formal engine to perform a same-cycle result in the ALU
[soc.git] / src / soc / fu / cr / cr_input_record.py
2021-04-23 Luke Kenneth Casso... move over to from openpower imports
2020-08-29 Luke Kenneth Casso... CR FXM becomes a full mask.
2020-07-19 Luke Kenneth Casso... remove unneeded import
2020-07-16 Luke Kenneth Casso... update cr input record to use new CompOpSubsetBase
2020-07-12 Luke Kenneth Casso... rename InternalOp to MicrOp
2020-07-08 Jacob LifshayMerge branch 'master' of ssh://git.libre-riscv.org...
2020-07-05 Luke Kenneth Casso... big reorg on PowerDecoder2, actually Decode2Execute1Type
2020-05-22 Luke Kenneth Casso... move CR over to CompCROpSubset
2020-05-21 Luke Kenneth Casso... remove input_cr, output_cr and is_32bit from CompCROpSubset
2020-05-21 Luke Kenneth Casso... add read_cr_whole and write_cr_whole to CompCROpSubset
2020-05-21 Luke Kenneth Casso... add first cut at cr_input_record.py