add all div* and mod* instructions to test_pipe_caller
[soc.git] / src / soc / fu / div / test / test_pipe_caller.py
2020-07-23 Jacob Lifshayadd all div* and mod* instructions to test_pipe_caller
2020-07-22 Jacob Lifshayworking on fsm
2020-07-17 Luke Kenneth Casso... whitespace
2020-07-17 Jacob Lifshayadd simulation-only division core using nmigen div...
2020-07-17 Jacob Lifshayrename DIV->Div to be consistent
2020-07-17 Jacob Lifshayformat div code
2020-07-12 Luke Kenneth Casso... rename InternalOp to MicrOp
2020-07-11 Luke Kenneth Casso... sorting out bigendian/littleendian including in qemu
2020-07-10 Luke Kenneth Casso... add a DIVS function as separate and discrete from floor_div
2020-07-10 Luke Kenneth Casso... add random unsigned div tests
2020-07-10 Luke Kenneth Casso... add overflow div tests
2020-07-10 Luke Kenneth Casso... re-enable div random tests and other regressions
2020-07-10 Luke Kenneth Casso... add test7 div regression
2020-07-10 Luke Kenneth Casso... add more debug output for #425
2020-07-10 Luke Kenneth Casso... add debugging chain for #425
2020-07-09 Luke Kenneth Casso... add regression test for div overflow case
2020-07-09 Luke Kenneth Casso... test top bit 31 in 32-bit mode for CR0 creation
2020-07-09 Luke Kenneth Casso... ha ha very funny. pipelines being pipelines, you have...
2020-07-09 Luke Kenneth Casso... something weird going on with div. interaction between...
2020-07-09 Luke Kenneth Casso... add debug output of DIV results
2020-07-09 Luke Kenneth Casso... check result first then CR second
2020-07-09 Luke Kenneth Casso... resolving issues with div tests (turned out to be nmuti...
2020-07-09 Luke Kenneth Casso... remove xer_ca from DIV pipeline (took a bit of messing...
2020-07-08 Jacob LifshayMerge branch 'master' of ssh://git.libre-riscv.org...
2020-07-05 Luke Kenneth Casso... big reorg on PowerDecoder2, actually Decode2Execute1Type
2020-06-29 Luke Kenneth Casso... use correct ALUHelpers in div test
2020-06-29 Luke Kenneth Casso... first unit test for div
2020-06-11 Luke Kenneth Casso... rename get_sim_cr_a to get_wr_sim_cr_a for now
2020-06-10 Luke Kenneth Casso... re-do cookie-cut of alu test_pipe_caller.py over to...
2020-06-10 Luke Kenneth Casso... ilang file output change from alu_pipeline.il to div_pi...
2020-06-10 Luke Kenneth Casso... cookie-cut alu test_pipe_caller.py over
2020-06-04 Luke Kenneth Casso... use copy of FHDLTestCase
2020-05-22 Luke Kenneth Casso... rename Logical to Div in fu div test
2020-05-22 Luke Kenneth Casso... cookie-cut start on div pipe