| 2022-02-23 |
Luke Kenneth Casso... | forgot to pass cix (cache-inhibited) through to LD... |
commit | commitdiff |
| 2022-01-28 |
Luke Kenneth Casso... | in LoadStore1 capture the address for misaligned dual... |
commit | commitdiff |
| 2022-01-28 |
Luke Kenneth Casso... | sort out misaligned store in LoadStore1 |
commit | commitdiff |
| 2022-01-27 |
Luke Kenneth Casso... | for second aligned request truncate address to nearest... |
commit | commitdiff |
| 2022-01-25 |
Luke Kenneth Casso... | LDSTException now passing bits of SRR1 around to the... |
commit | commitdiff |
| 2022-01-16 |
Luke Kenneth Casso... | raise interrupt on misaligned atomic LDST |
commit | commitdiff |
| 2022-01-16 |
Luke Kenneth Casso... | pass over store_done correctly from dcache over PortInt... |
commit | commitdiff |
| 2022-01-16 |
Luke Kenneth Casso... | add CR0 to LDSTCompUnit, for reporting if LR/SC store... |
commit | commitdiff |
| 2022-01-15 |
Luke Kenneth Casso... | pass over atomic signals to dcache from loadstore. |
commit | commitdiff |
| 2022-01-15 |
Luke Kenneth Casso... | pass atomic reserve through from PortInterface to DCache |
commit | commitdiff |
| 2022-01-12 |
Luke Kenneth Casso... | fix issue with priv_mode not being passed correctly... |
commit | commitdiff |
| 2022-01-10 |
Luke Kenneth Casso... | LoadStore1 priv_mode was not being correctly picked... |
commit | commitdiff |
| 2022-01-08 |
Luke Kenneth Casso... | fix MMU lookup after 2nd request (misaligned) by also... |
commit | commitdiff |
| 2022-01-08 |
Luke Kenneth Casso... | do not clear out ldst request after TLB entry is added |
commit | commitdiff |
| 2022-01-08 |
Luke Kenneth Casso... | add a second LD request to dcache which is merged with... |
commit | commitdiff |
| 2022-01-08 |
Luke Kenneth Casso... | start adding in mis-aligned LD/ST support into LoadStore1 |
commit | commitdiff |
| 2022-01-06 |
Luke Kenneth Casso... | add SECOND_REQ state to loadstore.py, not yet implemented |
commit | commitdiff |
| 2022-01-03 |
Luke Kenneth Casso... | adding an extra option to issuer_verilog.py to be able... |
commit | commitdiff |
| 2021-12-28 |
Luke Kenneth Casso... | add misaligned mmu.bin test 5 notes: currently LoadStor... |
commit | commitdiff |
| 2021-12-26 |
Luke Kenneth Casso... | rename addr to raddr in LoadStore1 to avoid conflict... |
commit | commitdiff |
| 2021-12-22 |
Luke Kenneth Casso... | when setting DSISR in LoadStore1 use correct load bit... |
commit | commitdiff |
| 2021-12-22 |
Luke Kenneth Casso... | remove unneeded state in LoadStore1 |
commit | commitdiff |
| 2021-12-22 |
Luke Kenneth Casso... | clear instruction fault on exception WAIT_MMU ACK in... |
commit | commitdiff |
| 2021-12-22 |
Luke Kenneth Casso... | clear out instr_fault when exception is thrown |
commit | commitdiff |
| 2021-12-22 |
Luke Kenneth Casso... | clear instruction fault on idle/valid in Loadstore1 |
commit | commitdiff |
| 2021-12-14 |
Luke Kenneth Casso... | get OP_FETCH_FAILED to respond/return an exception... |
commit | commitdiff |
| 2021-12-13 |
Luke Kenneth Casso... | convert LoadStore1 to new msr.pr/dr/sf |
commit | commitdiff |
| 2021-12-11 |
Luke Kenneth Casso... | connect up I-Cache to FetchUnitInterface |
commit | commitdiff |
| 2021-12-08 |
Luke Kenneth Casso... | make LoadStore1 intsr_fault a "captured flag" - strictl... |
commit | commitdiff |
| 2021-12-08 |
Luke Kenneth Casso... | add instr_fault to LoadStore1 FSM |
commit | commitdiff |
| 2021-12-07 |
Luke Kenneth Casso... | set separate "iside" signal in LoadStore1 to not confuse it |
commit | commitdiff |
| 2021-12-07 |
Luke Kenneth Casso... | add in I-Cache into LoadStore1 - presently unused ... |
commit | commitdiff |
| 2021-12-05 |
Luke Kenneth Casso... | wishbone bus convert on dcache |
commit | commitdiff |
| 2021-12-04 |
Luke Kenneth Casso... | put DSISR and DAR publicly accessible in LoadStore1 |
commit | commitdiff |
| 2021-12-04 |
Luke Kenneth Casso... | whoops fix up exception happened if alignment triggers... |
commit | commitdiff |
| 2021-12-04 |
Luke Kenneth Casso... | fixing DAR updating from exceptions |
commit | commitdiff |
| 2021-12-04 |
Luke Kenneth Casso... | MMU lookup DSISR load bit inverted in LoadStore1 |
commit | commitdiff |
| 2021-12-04 |
Luke Kenneth Casso... | store DAR in LoadStore1 |
commit | commitdiff |
| 2021-12-04 |
Luke Kenneth Casso... | not busy if excrption occurs on MMU_LOOKUP in loadstore.py |
commit | commitdiff |
| 2021-12-04 |
Luke Kenneth Casso... | add means to update dsisr from MMU FSM. TODO: add a... |
commit | commitdiff |
| 2021-12-03 |
Luke Kenneth Casso... | priv_mode/virt_mode are set in the request, which is... |
commit | commitdiff |
| 2021-12-03 |
Luke Kenneth Casso... | in loadstore.py set align_intr from request which comes... |
commit | commitdiff |
| 2021-12-03 |
Luke Kenneth Casso... | driver conflict on priv_mode and virt_mode, do not... |
commit | commitdiff |
| 2021-12-03 |
Luke Kenneth Casso... | in loadstore.py, when an exception is done or if the FSM |
commit | commitdiff |
| 2021-11-30 |
Tobias Platen | return correct data from microwatt |
commit | commitdiff |
| 2021-11-30 |
Tobias Platen | loadstore: add done_delay |
commit | commitdiff |
| 2021-11-25 |
Tobias Platen | remove unuses dsisr signal |
commit | commitdiff |
| 2021-11-25 |
Tobias Platen | reset state to idle on exception |
commit | commitdiff |
| 2021-11-16 |
Tobias Platen | loadstore1 now reports exception reason |
commit | commitdiff |
| 2021-11-15 |
Tobias Platen | report dar on exception + test case |
commit | commitdiff |
| 2021-11-03 |
Tobias Platen | loadstore.py: add Display statement on SPR change |
commit | commitdiff |
| 2021-10-30 |
Tobias Platen | loadstore.py: add debug output for dcbz |
commit | commitdiff |
| 2021-10-08 |
Tobias Platen | an extra dcbz parameter in all six places |
commit | commitdiff |
| 2021-10-08 |
Luke Kenneth Casso... | commented-out and disabled the set_dcbz_addr function... |
commit | commitdiff |
| 2021-10-08 |
Tobias Platen | dcbz symbol rename |
commit | commitdiff |
| 2021-10-08 |
Tobias Platen | loadstore.py: add function set_dcbz_addr |
commit | commitdiff |
| 2021-10-03 |
Tobias Platen | an extra dcbz parameter in all six places |
commit | commitdiff |
| 2021-10-02 |
Luke Kenneth Casso... | commented-out and disabled the set_dcbz_addr function... |
commit | commitdiff |
| 2021-10-02 |
Tobias Platen | dcbz symbol rename |
commit | commitdiff |
| 2021-10-02 |
Tobias Platen | loadstore.py: add function set_dcbz_addr |
commit | commitdiff |
| 2021-07-23 |
Tobias Platen | ldst: cleanup debug outputs |
commit | commitdiff |
| 2021-07-14 |
Tobias Platen | add more debug outputs, pass dcbz to loadstore/dcache |
commit | commitdiff |
| 2021-07-11 |
Tobias Platen | pass self.pi.is_dcbz to request |
commit | commitdiff |
| 2021-06-18 |
Tobias Platen | src/soc/fu/ldst/loadstore.py: keep data for the whole... |
commit | commitdiff |
| 2021-05-14 |
Luke Kenneth Casso... | clear out request data on return to idle |
commit | commitdiff |
| 2021-05-14 |
Luke Kenneth Casso... | sort out LoadStore1 misalignment FSM, also required... |
commit | commitdiff |
| 2021-05-12 |
Luke Kenneth Casso... | set m_out.load from ldst_r(egister) in LoadStore1 |
commit | commitdiff |
| 2021-05-12 |
Luke Kenneth Casso... | experimentation with MMU-enabled LoadStore1 through... |
commit | commitdiff |
| 2021-05-12 |
Luke Kenneth Casso... | add debug info, update comments, disable dcache in... |
commit | commitdiff |
| 2021-05-12 |
Luke Kenneth Casso... | start doing virtual memory queries via PortInterface... |
commit | commitdiff |
| 2021-05-11 |
Luke Kenneth Casso... | pass through MSR.PR through PortInterface, into LoadStore1 |
commit | commitdiff |
| 2021-05-11 |
Luke Kenneth Casso... | comment tidyup |
commit | commitdiff |
| 2021-05-11 |
Luke Kenneth Casso... | must also pass through instruction fault exception... |
commit | commitdiff |
| 2021-05-11 |
Luke Kenneth Casso... | tidyup comments and remove LoadStore COMPLETE state |
commit | commitdiff |
| 2021-05-11 |
Luke Kenneth Casso... | cleanup on exception setting |
commit | commitdiff |
| 2021-05-11 |
Luke Kenneth Casso... | rename LoadStore1 data structures back to microwatt... |
commit | commitdiff |
| 2021-05-10 |
Luke Kenneth Casso... | add block for MMU activation to LoadStore1 |
commit | commitdiff |
| 2021-05-10 |
Luke Kenneth Casso... | move LoadStore1 d_validblip setting, and get MMU_LOOKUP... |
commit | commitdiff |
| 2021-05-10 |
Tobias Platen | style-wise: use ~self.instr_fault not self.instr_fault==0 |
commit | commitdiff |
| 2021-05-10 |
Tobias Platen | LoadStore1: add rules for MMU_LOOKUP |
commit | commitdiff |
| 2021-05-09 |
Luke Kenneth Casso... | add comments on translation of MMU_LOOKUP |
commit | commitdiff |
| 2021-05-09 |
Luke Kenneth Casso... | install MMU_LOOKUP vhdl to be translated to nmigen |
commit | commitdiff |
| 2021-05-09 |
Luke Kenneth Casso... | move (unused) ACK_WAIT code into FSM |
commit | commitdiff |
| 2021-05-09 |
Luke Kenneth Casso... | add comments in LoadStore1 |
commit | commitdiff |
| 2021-05-09 |
Luke Kenneth Casso... | remove invalid setting of d_in.valid from self.mmureq |
commit | commitdiff |
| 2021-05-09 |
Luke Kenneth Casso... | no SECOND_REQ |
commit | commitdiff |
| 2021-05-09 |
Luke Kenneth Casso... | remove SECOND_REQ |
commit | commitdiff |
| 2021-05-09 |
Tobias Platen | src/soc/fu/ldst/loadstore.py drive output d_in.valid |
commit | commitdiff |
| 2021-05-09 |
Tobias Platen | move skeleton to elaborate |
commit | commitdiff |
| 2021-05-09 |
Tobias Platen | src/soc/fu/ldst/loadstore.py: add skeleton for fsm |
commit | commitdiff |
| 2021-05-09 |
Luke Kenneth Casso... | update code-comments |
commit | commitdiff |
| 2021-05-09 |
Luke Kenneth Casso... | add in alignment exception capture/reporting in LoadStore1 |
commit | commitdiff |
| 2021-05-09 |
Luke Kenneth Casso... | add misalign flag to PortInterfaceBase |
commit | commitdiff |
| 2021-05-08 |
Luke Kenneth Casso... | LoadStore1 tidyup |
commit | commitdiff |
| 2021-05-08 |
Luke Kenneth Casso... | transferring more over to LoadStore FSM |
commit | commitdiff |
| 2021-05-08 |
Luke Kenneth Casso... | start putting state info into LoadStore1, slowly puttin... |
commit | commitdiff |
| 2021-05-08 |
Luke Kenneth Casso... | add LoadStore State enum |
commit | commitdiff |
| 2021-05-07 |
Luke Kenneth Casso... | start setting DSISR bits but commented out |
commit | commitdiff |
| 2021-05-07 |
Luke Kenneth Casso... | move LoadStore1 class to soc.fu.ldst.loadstore |
commit | commitdiff |
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projects / soc.git / history