noticed the regular pattern in all pipe_data.py (regspecs).
[soc.git] / src / soc / fu / regspec.py
2020-06-06 Luke Kenneth Casso... noticed the regular pattern in all pipe_data.py (regspecs).
2020-06-03 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2020-06-03 Luke Kenneth Casso... move over to using power_regspec_map.py from PowerDecod...
2020-06-02 Luke Kenneth Casso... move regspec function to separate module
2020-06-02 Luke Kenneth Casso... add in fast regs support in decoder and into regspec_decode
2020-06-02 Luke Kenneth Casso... add write-regs encoding to regspec decoder
2020-06-02 Luke Kenneth Casso... add read-write register numbering detection
2020-06-02 Luke Kenneth Casso... whoops syntax error
2020-06-02 Luke Kenneth Casso... add function expressing the relationship between regspe...
2020-05-30 Luke Kenneth Casso... add in write-mask into MultiCompUnit and MCU-ALU unit...
2020-05-28 Luke Kenneth Casso... debugging test_alu_compunit.py
2020-05-24 Luke Kenneth Casso... over 80 char limit
2020-05-23 Luke Kenneth Casso... document purpose of regspec module
2020-05-23 Luke Kenneth Casso... split out RegSpecs into separate module