Allow the formal engine to perform a same-cycle result in the ALU
[soc.git] / src / soc / fu / shift_rot / sr_input_record.py
2021-04-23 Luke Kenneth Casso... move over to from openpower imports
2020-10-07 Luke Kenneth Casso... missing invert_in field from shiftrot input record
2020-09-07 Luke Kenneth Casso... bit of a big reorg of data structures
2020-08-27 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc
2020-08-27 Luke Kenneth Casso... oink, write_cr shiftrot record width was zero (??)
2020-07-16 Luke Kenneth Casso... more tidyup on use of CompOpSubsetBase
2020-07-12 Luke Kenneth Casso... rename InternalOp to MicrOp
2020-07-08 Jacob LifshayMerge branch 'master' of ssh://git.libre-riscv.org...
2020-07-05 Luke Kenneth Casso... big reorg on PowerDecoder2, actually Decode2Execute1Type
2020-06-01 Luke Kenneth Casso... more unneeded fields from SR InputRecord
2020-06-01 Luke Kenneth Casso... remove data_len from SR input record
2020-06-01 Luke Kenneth Casso... remove zero/invert from ShiftRot Input Record
2020-06-01 Luke Kenneth Casso... add shift-rot input record and use it