skip Decode2ToOperand from PowerDecodeSubset
[soc.git] / src / soc / simple / core.py
2020-10-06 Luke Kenneth Casso... skip Decode2ToOperand from PowerDecodeSubset
2020-09-28 Luke Kenneth Casso... missing pspec
2020-09-28 Luke Kenneth Casso... add "nocore" option to build verilog
2020-09-22 Luke Kenneth Casso... add MMU (commented out)
2020-09-08 Luke Kenneth Casso... create a special subset of Decoder Record for storing...
2020-09-08 Luke Kenneth Casso... give Decode2Execute1Type in core a name
2020-09-08 Luke Kenneth Casso... pass in CoreState to PowerDecoder rather than eq a...
2020-09-07 Luke Kenneth Casso... use PowerDecoderSubsets for FUs, except for TRAP which...
2020-09-07 Luke Kenneth Casso... add per-FU PowerDecoders. should now be subsettable
2020-09-05 Luke Kenneth Casso... connect XICS core irq to Decode2 eint
2020-09-04 Luke Kenneth Casso... adding option to include XICS external interrupts.
2020-08-15 Luke Kenneth Casso... rather big change to interaction between regfile and...
2020-08-14 Luke Kenneth Casso... move instruction decoder out of core
2020-08-14 Luke Kenneth Casso... move regspec / rdflag decoding functions out of PowerDe...
2020-08-14 Luke Kenneth Casso... put multi-ports back (for read) on int and fast regfiles
2020-08-13 Luke Kenneth Casso... sync on read of regfile ports
2020-08-13 Luke Kenneth Casso... sigh. convert INT regfile to binary addressing
2020-08-11 Luke Kenneth Casso... sigh, remove yet another int regfile read port
2020-08-11 Luke Kenneth Casso... massive reduction in gate count by using alternative...
2020-08-11 Luke Kenneth Casso... reduce regfile port usage for INT and FAST
2020-08-11 Luke Kenneth Casso... prepare write ports to be shared
2020-08-11 Luke Kenneth Casso... move write regfile picker creation to new function
2020-08-11 Luke Kenneth Casso... reducing regfile port usage by sharing read ports
2020-08-10 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc
2020-08-09 Luke Kenneth Casso... write pulse in issuer
2020-08-04 Luke Kenneth Casso... allow instruction to run if initiated whilst "stopped...
2020-08-03 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2020-08-03 Luke Kenneth Casso... change over to DMI debug start/stop interface
2020-07-29 Luke Kenneth Casso... bit of a big change: add prefixes "cu_" to all CompUnit...
2020-07-23 Luke Kenneth Casso... begin core in running state
2020-07-22 Jacob LifshayMerge remote-tracking branch 'origin/master'
2020-07-22 Jacob Lifshayformat code
2020-07-19 Luke Kenneth Casso... do not start core in terminated mode
2020-07-12 Luke Kenneth Casso... rename InternalOp to MicrOp
2020-07-12 Luke Kenneth Casso... code-morph on core connect_instruction
2020-07-11 Luke Kenneth Casso... sort out core write latching: gate by busy, and use...
2020-07-11 Luke Kenneth Casso... * clarifying core function unit enable
2020-07-08 Jacob LifshayMerge branch 'master' of ssh://git.libre-riscv.org...
2020-07-07 Luke Kenneth Casso... sort-of got binary execution test working
2020-07-07 Luke Kenneth Casso... ordering of tests for OP_ATTN needed shuffling. seems...
2020-07-07 Luke Kenneth Casso... debugging termination / OP_ATTN
2020-07-07 Luke Kenneth Casso... add core start/stop capability, and OP_ATTN support
2020-07-05 Luke Kenneth Casso... big reorg on PowerDecoder2, actually Decode2Execute1Type
2020-07-05 Luke Kenneth Casso... move valid signal out of Decode2ToExecute1Type and...
2020-07-02 Luke Kenneth Casso... allow flexible selection of the types of ALUs
2020-07-02 Luke Kenneth Casso... add bare wishbone option to TestIssuer, sort out ports
2020-07-02 Luke Kenneth Casso... use single-arg pspec for TestIssuer and Core
2020-06-27 Luke Kenneth Casso... make PortInterface modules consistent with same API
2020-06-23 Luke Kenneth Casso... TstL0CacheBuffer returns array of ports differently now
2020-06-18 Jacob LifshayMerge branch 'master' of ssh://git.libre-riscv.org...
2020-06-18 Luke Kenneth Casso... whoops generate core ilang not TestIssuer
2020-06-17 Luke Kenneth Casso... split out TestIssuer into separate module
2020-06-17 Luke Kenneth Casso... got test_issuer FSM operating. bit of a hack
2020-06-17 Luke Kenneth Casso... debugging test_issuer, getting FSM working
2020-06-16 Luke Kenneth Casso... reduce instruction depth to 6 bits in TestIssuer
2020-06-16 Luke Kenneth Casso... hack LD/ST ad/st together, allow PC to be set externally
2020-06-16 Luke Kenneth Casso... set up a TestIssuer class with a FSM for doing instruct...
2020-06-16 Luke Kenneth Casso... add beginnings of TestIssuer class, to issue instructio...
2020-06-16 Luke Kenneth Casso... weird: adding TestMemory with no port causes nmigen...
2020-06-16 Luke Kenneth Casso... refer to signals directly in Test Core
2020-06-16 Luke Kenneth Casso... add test instruction memory SRAM
2020-06-15 Luke Kenneth Casso... whoops LDSTCompUnit was identified as a Function.ALU...
2020-06-15 Luke Kenneth Casso... add in TstL0CacheBuffer but disable temporarily
2020-06-10 Luke Kenneth Casso... code-morph regspecmap functions, split into separate...
2020-06-05 Luke Kenneth Casso... name regfile ports by name not numerical position
2020-06-05 Luke Kenneth Casso... whoops connecting up CR in wrong order. fixing with...
2020-06-04 Luke Kenneth Casso... whoops, docstring indentation
2020-06-04 Luke Kenneth Casso... add docstrings for read/write port connection
2020-06-04 Luke Kenneth Casso... move core code into separate functions, for clarity
2020-06-04 Luke Kenneth Casso... oops forgot to switch write-enable off
2020-06-04 Luke Kenneth Casso... hmmm sync-delay wport write and wen
2020-06-04 Luke Kenneth Casso... comment out wrflag as it should already be in the fu...
2020-06-04 Luke Kenneth Casso... sync onto fu.go_wr_i otherwise a loop occurs
2020-06-04 Luke Kenneth Casso... add rdmask and issue/busy setting
2020-06-04 Luke Kenneth Casso... connect up write-ports from Regfiles to FUs
2020-06-04 Luke Kenneth Casso... update docstring on simple/core.py
2020-06-04 Luke Kenneth Casso... move regfile/spec organiser to separate function
2020-06-04 Luke Kenneth Casso... collate fu-enable signals
2020-06-04 Luke Kenneth Casso... connect up Function Unit operand subsets
2020-06-03 Luke Kenneth Casso... forgot to add in rdflag enable
2020-06-03 Luke Kenneth Casso... whoops, regfiles are uppercase
2020-06-03 Luke Kenneth Casso... whoops needed a bit of a reorg of the data structure...
2020-06-03 Luke Kenneth Casso... hmmm got naming wrong in regfile-fu connectivity
2020-06-03 Luke Kenneth Casso... whoops names of regfiles are lower-case
2020-06-03 Luke Kenneth Casso... munge/redirect the regfile port based on the naming
2020-06-03 Luke Kenneth Casso... connect read-enable and src_i to regfile ports
2020-06-03 Luke Kenneth Casso... link up PriorityPickers on read channels
2020-06-03 Luke Kenneth Casso... put rdspecs into a different dictionary
2020-06-03 Luke Kenneth Casso... start putting a non-production core together,
2020-06-03 Luke Kenneth Casso... add a simple core, not intended for production use