replace PartitionedSignal with SimdSignal
[soc.git] / src / soc / simple / issuer.py
2021-09-25 Las SafinMerge remote-tracking branch 'upstream/master' into pr
2021-09-10 Luke Kenneth Casso... update explanatory comments on LD/ST exception handling
2021-09-08 Cesar StraussMonitor exceptions, re-decoding the instruction in...
2021-08-29 Luke Kenneth Casso... unnecessary signal rename ivalid_i to ii_valid (reverting)
2021-08-24 Luke Kenneth Casso... replace data_o with o_data and data_i with i_data as...
2021-08-24 Luke Kenneth Casso... big rename, global/search/replace of ready_o with o_rea...
2021-07-14 Luke Kenneth Casso... update SVSTATE to 64 bit length (fortunately very easy)
2021-07-12 Luke Kenneth Casso... use default decoder, do not pass one in.
2021-06-24 Luke Kenneth Casso... propagate new use_svp64_ldst_dec mode through TestCore...
2021-06-24 Luke Kenneth Casso... add an explicit PowerDecoder.is_svp64_mode flag to...
2021-06-09 Luke Kenneth Casso... disconnect pll clock, connected in peripheral interconnect
2021-06-09 Luke Kenneth Casso... add in/out of ref_clk and pllclk_clk when PLL enabled
2021-06-03 Luke Kenneth Casso... comment out domains that have already been created
2021-06-03 Luke Kenneth Casso... no, do not assign clock to clock!
2021-06-03 Luke Kenneth Casso... sort out PLL domains but bypass PLL due to lack of...
2021-06-03 Luke Kenneth Casso... use DomainRenamer on all sub-components of TestIssuer
2021-06-03 Luke Kenneth Casso... make core_rst a member of TestIssuerInternal
2021-05-27 Luke Kenneth Casso... adjust PLL connections looking for coriolis2 issue
2021-05-26 Luke Kenneth Casso... arse. PLL test_issuer clk_sel_i accidentally only 1...
2021-05-26 Luke Kenneth Casso... remove err feature from sram4k wb
2021-05-26 Luke Kenneth Casso... rename PLL signals
2021-05-24 Luke Kenneth Casso... match up PLL names
2021-05-22 Luke Kenneth Casso... update PLL to use Instance
2021-05-13 Luke Kenneth Casso... update comments in issuer.py regarding a 4th FSM
2021-05-09 Luke Kenneth Casso... add comment about LD/ST exception needs copying into...
2021-05-07 Luke Kenneth Casso... whoops setup of core.sv_pred_sm/dm not indented and...
2021-05-06 Luke Kenneth Casso... pass relevant predicate mask bits through to Decoders...
2021-05-06 Luke Kenneth Casso... add in predicate mask bit detection when zeroing is...
2021-05-06 Luke Kenneth Casso... pass SVP64 ReMap field through to core and then on...
2021-05-05 Luke Kenneth Casso... whoops wrong signal name, set exc_happened
2021-05-04 Luke Kenneth Casso... add TODO comments and cross-reference to bug
2021-05-04 Luke Kenneth Casso... note a way to see if an exception happened, in TestIssuer
2021-04-30 Luke Kenneth Casso... set up LoadStore1 in ConfigMemoryPortInterface and...
2021-04-25 Cesar StraussShift-out skipped mask bits for both crpred and intpred
2021-04-24 Luke Kenneth Casso... whitespace
2021-04-23 Luke Kenneth Casso... more openpower-isa conversion
2021-04-23 Luke Kenneth Casso... move over to from openpower imports
2021-04-22 Cesar StraussImplement CR predication
2021-04-21 Cesar StraussCR sub-fields are stored in MSB0 order
2021-04-21 Cesar StraussFix sense of "invert" signal
2021-04-18 Luke Kenneth Casso... create signal on test_issuer which gives PLL clk_sel_i...
2021-04-18 Luke Kenneth Casso... rename PLL pins to match LIP6.fr PLL
2021-04-18 Luke Kenneth Casso... core_stopped_i unused: remove
2021-04-17 Cesar StraussImplement 1<<r3 directly by a shift
2021-04-10 Cesar StraussImplement 1<<r3 predicate mode
2021-04-09 Luke Kenneth Casso... test firmware upload program needed to branch back...
2021-04-08 Luke Kenneth Casso... sort out pc reset when DMI interface requests reset
2021-04-06 Cesar StraussMake the VL loop reentrant in HDL
2021-04-03 Cesar StraussReminder for a possible hardware optimization
2021-04-03 Cesar StraussBe more precise when using a one-bit constant
2021-04-03 Cesar StraussSignal the simulator when completing a VL loop
2021-04-01 Luke Kenneth Casso... TWI enabled in JTAG boundary scan
2021-04-01 Luke Kenneth Casso... reduce subset of functions to be created in JTAG bounda...
2021-04-01 Luke Kenneth Casso... bug in iverilog, segfaults due to empty case statement
2021-03-30 Alain D D WilliamsMerge branch 'master' of git.libre-soc.org:soc
2021-03-30 Cesar StraussSkip leading zero bits on predicate masks
2021-03-28 Cesar StraussMove DECODE_SV to its place between MASK_WAIT and INSN_...
2021-03-28 Cesar StraussMove instruction decoding to after predication
2021-03-28 Cesar StraussPrepare to advance src/dst step after getting the predi...
2021-03-28 Luke Kenneth Casso... rather invasive reduction of SPR regfile size
2021-03-28 Luke Kenneth Casso... reduce regfile port usage on non-svp64
2021-03-24 Luke Kenneth Casso... comment about using PriorityEncoder
2021-03-22 Luke Kenneth Casso... do not set sv_changed
2021-03-22 Luke Kenneth Casso... make sure non-svp64-mode works
2021-03-22 Luke Kenneth Casso... have get_predint return indicator that mask is all 1s
2021-03-22 Cesar StraussSkip fetching integer predicate mask when register...
2021-03-22 Cesar StraussDecode and fetch integer predicate registers
2021-03-21 Cesar StraussFix typo
2021-03-21 Cesar StraussAdd unique name to decoded predication signals
2021-03-21 Cesar StraussRevert removal of *.value from Enums
2021-03-21 Cesar StraussFix syntax
2021-03-21 Luke Kenneth Casso... more TODO comments
2021-03-21 Luke Kenneth Casso... add for-loop pseudocode for CR predicate mask reading
2021-03-21 Luke Kenneth Casso... code comments in TestIssuer
2021-03-21 Cesar StraussStart work on the predicate fetch FSM
2021-03-20 Luke Kenneth Casso... more pseudocode in TestIssuer
2021-03-20 Luke Kenneth Casso... add harmless code and commented-out pseudocode for...
2021-03-19 Luke Kenneth Casso... more comments for TestIssuer when adding predication
2021-03-19 Luke Kenneth Casso... comments for TestIssuer get_predint and get_predcr
2021-03-19 Luke Kenneth Casso... add more pieces of predication reading puzzle to TestIssuer
2021-03-19 Luke Kenneth Casso... cleanup TestIssuer (comments)
2021-03-19 Luke Kenneth Casso... spelling
2021-03-19 Luke Kenneth Casso... code-shuffle in TestIssuer, split out setting up periph...
2021-03-19 Luke Kenneth Casso... move duplicated code to a function in TestIssuer
2021-03-18 Luke Kenneth Casso... more hint/comments
2021-03-18 Luke Kenneth Casso... update TestIssuer comments
2021-03-18 Luke Kenneth Casso... add comments on most likely place to put predicate...
2021-03-18 Luke Kenneth Casso... comments TestIssuer, add a stub FSM
2021-03-17 Luke Kenneth Casso... add SVP64 dststep incrementing in PowerDecoder2, Testis...
2021-03-14 Cesar StraussActivate the VL==0 loop with any SVP64 prefix whatsoever
2021-03-12 Luke Kenneth Casso... use PowerDecoder2.loop_continue instead of no_out_vec
2021-03-11 Luke Kenneth Casso... add link of RA_OR_ZERO SVP64 detection
2021-03-09 Cesar StraussCreate a new signal for the Simulator to wait on
2021-03-08 Luke Kenneth Casso... actually make it possible to disable svp64 on commandli...
2021-03-08 Cesar StraussRemove the unused internal insn_done signal
2021-03-08 Cesar StraussFix argument order to match function declaration
2021-03-07 Cesar StraussMerge WAIT_RESET into INSN_FETCH on the Issue FSM
2021-03-07 Luke Kenneth Casso... move DMI stuff to separate function in issuer.py
2021-03-07 Luke Kenneth Casso... update comments in issuer.py
2021-03-07 Cesar StraussImplement the VL==0 loop
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