Allow the formal engine to perform a same-cycle result in the ALU
[soc.git] / src / soc / simple / test /
2023-09-12 Jacob Lifshayskip test_microwatt.BinaryTestCase.test_binary if file...
2022-08-14 Luke Kenneth Casso... grr not a yield function
2022-08-14 Luke Kenneth Casso... add get_fpregs stub function to HDLstate
2022-01-21 Luke Kenneth Casso... whoops fix bug in setting of DEC/TB (State) in test_core.py
2022-01-19 Luke Kenneth Casso... move DEC and TB into StateRegs, to make room in FastRegs
2022-01-17 Luke Kenneth Casso... fix hrfid and mtmsrd so that it is identical to microwatt
2022-01-15 Luke Kenneth Casso... enable both linux-5.7 tests
2022-01-14 Luke Kenneth Casso... second test for linux-5.7
2022-01-09 Luke Kenneth Casso... add linux-5.7 unit test which showed a silly error:
2021-12-30 Luke Kenneth Casso... rename nia to cia in MMU input record and mmu FSM
2021-12-28 Cesar StraussAdd an --inorder option to test_issuer.py
2021-12-25 Luke Kenneth Casso... add mmu.bin test2 to much simpler test_loadstore1.py
2021-12-25 Luke Kenneth Casso... move microwatt mmu.bin test 3 page table to test pageta...
2021-12-25 Luke Kenneth Casso... wait for MMU "done" when setting PRTBL and PIDR
2021-12-25 Luke Kenneth Casso... add microwatt mmu.bin regression test test_mmu_3
2021-12-24 Luke Kenneth Casso... enable instruction redirect in mmu ifetch test
2021-12-21 Luke Kenneth Casso... for each unit test case in test_issuer_mmu_data_path...
2021-12-21 Luke Kenneth Casso... test_issuer_mmu_data_path.py needs to use wb_get because of
2021-12-20 Luke Kenneth Casso... set up DAR correctly in unit tests, added set_ldst_spr...
2021-12-19 Luke Kenneth Casso... add hard stop address in ifetch unit test, bit of a...
2021-12-19 Luke Kenneth Casso... add DMI STOPADDR register and use it in HDLRunner to...
2021-12-19 Luke Kenneth Casso... break out when core is stopped in HDLRunner
2021-12-18 Luke Kenneth Casso... sort out reset signalling after tracking down Simulatio...
2021-12-18 Luke Kenneth Casso... add icache/dcache/mmu unit test for TestIssuer
2021-12-18 Luke Kenneth Casso... get instructions to re-run in issuer after I-Cache...
2021-12-16 Luke Kenneth Casso... set_mmu_spr was using the slow-SPR index for the regfile
2021-12-15 Luke Kenneth Casso... whoops accidentally commented out setup of instructions
2021-12-14 Luke Kenneth Casso... update wb_get memory with instructions if required
2021-12-12 Luke Kenneth Casso... print debugs established that when a wb_get memory...
2021-12-09 Jacob Lifshaymake argv handling more flexible
2021-12-09 Jacob Lifshayformat code
2021-12-05 Luke Kenneth Casso... correct import of wg_get function
2021-12-04 Luke Kenneth Casso... whoops
2021-12-04 Luke Kenneth Casso... MMU lookup DSISR load bit inverted in LoadStore1
2021-12-03 Luke Kenneth Casso... add misaligned ld/st to trigger an exception
2021-12-01 Luke Kenneth Casso... stack of changes to MultiCompUnit to speed it up
2021-12-01 Luke Kenneth Casso... FunctionUnitBaseMulti which derives from ReservationSta...
2021-11-30 Luke Kenneth Casso... start allocating more FUs (more ReservationStations)
2021-11-30 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-11-30 Luke Kenneth Casso... add LogicalTestCases back in to test_core.py (pass)
2021-11-30 Luke Kenneth Casso... let PowerDecode2 decide which operand class to use...
2021-11-30 Luke Kenneth Casso... allow busy to settle before checking state in test_core.py
2021-11-30 Luke Kenneth Casso... only check regs right at the end in test_core.py overla...
2021-11-30 Luke Kenneth Casso... move sim call before core run in test_core.py
2021-11-30 Luke Kenneth Casso... getting formerly unused test_core.py operational
2021-11-24 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-11-24 Luke Kenneth Casso... when allow_overlap enabled do a manual wait until all...
2021-11-22 Luke Kenneth Casso... whoops accidentally committed commented-out test for...
2021-11-21 Luke Kenneth Casso... parse test_issuer args allow option "allow-overlap...
2021-11-21 Luke Kenneth Casso... complex. TestRunner now does not work properly unless...
2021-11-19 Luke Kenneth Casso... debug and cleanup
2021-11-19 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-11-18 Luke Kenneth Casso... experiment allowing overlap (activated with --allow...
2021-11-18 Luke Kenneth Casso... remove unneeded import
2021-11-17 Luke Kenneth Casso... add option to test_issuer.py to allow for overlapping...
2021-11-17 Luke Kenneth Casso... add ability to run hazard instruction for test purposes
2021-11-11 Luke Kenneth Casso... invert numbering on CR HDLState.get_crregs
2021-11-10 Luke Kenneth Casso... update store data reg 10 to 0xfe in virtmode mmu test
2021-11-10 Luke Kenneth Casso... allow MSR to be set in StateRegs in test_core.py
2021-11-10 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-11-10 Tobias Platentest testcase for exception
2021-11-09 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-11-09 Tobias Platentest_issuer_mmu.py: add case_5_allsprs
2021-11-08 Tobias Platenmmu unit test working again
2021-11-07 Luke Kenneth Casso... for some reason mul test cases had not been added to...
2021-11-06 Tobias Platenupdate test_issuer_mmu.py testcase, add needed debug...
2021-11-05 Tobias Platentlbie, mtspr and mfspr test cases
2021-11-05 Tobias Platenadd mmu/dcache unit test
2021-11-01 Tobias Platentest_issuer_dcache.py: cleanup
2021-10-08 klehmancomments for test_runner pr
2021-10-08 klehmanadded comment to teststate
2021-10-08 Luke Kenneth Casso... move TestRunner to openpower-isa now that it is part...
2021-10-08 klehmanadd a state list for method calling
2021-10-08 Luke Kenneth Casso... found accidental commenting-out of memory setup in...
2021-10-08 Luke Kenneth Casso... move debug printout to see whats going on for ldst
2021-10-08 Luke Kenneth Casso... comments
2021-10-08 Luke Kenneth Casso... Revert "move coresync clock synchronisation into HDLRunner"
2021-10-08 Luke Kenneth Casso... call StateRunner constructor, to add to StateRunner...
2021-10-08 Luke Kenneth Casso... more TODO comments
2021-10-08 Luke Kenneth Casso... move coresync clock synchronisation into HDLRunner
2021-10-08 Luke Kenneth Casso... whoops missed one function which should be a yield...
2021-10-08 Luke Kenneth Casso... use yield from on StateRunners
2021-10-08 Luke Kenneth Casso... add comments, remove unneeded code
2021-10-08 Luke Kenneth Casso... move pc_i and svstate_i to HDLRunner
2021-10-08 klehmanadd end_test, minor cleanup, added hdlrun.cleanup(...
2021-10-08 klehmanmoved pc_i and sv_state to constructor, remove hdl_stat...
2021-10-08 klehmanchange over run_hdl_state to TestRunner class
2021-10-08 Luke Kenneth Casso... add dummy call to simrun and end_test()
2021-10-08 Luke Kenneth Casso... code-comments and dummy functions
2021-10-08 Luke Kenneth Casso... move contents of run_sim_state into SimRunner run_test...
2021-10-08 Luke Kenneth Casso... add a SimRunner prepare_for_test and run_test function
2021-10-07 klehmancomments for test_runner
2021-10-07 klehmanadded comment to teststate
2021-10-01 Luke Kenneth Casso... move TestRunner to openpower-isa now that it is part...
2021-09-26 klehmanadd a state list for method calling
2021-09-25 Luke Kenneth Casso... found accidental commenting-out of memory setup in...
2021-09-25 Luke Kenneth Casso... move debug printout to see whats going on for ldst
2021-09-25 Luke Kenneth Casso... comments
2021-09-25 Luke Kenneth Casso... Revert "move coresync clock synchronisation into HDLRunner"
2021-09-25 Luke Kenneth Casso... call StateRunner constructor, to add to StateRunner...
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