replace PartitionedSignal with SimdSignal
[soc.git] / src / soc / simple / test /
9 days ago klehmancomments for test_runner pr
9 days ago klehmanadded comment to teststate
9 days ago Luke Kenneth Casso... move TestRunner to openpower-isa now that it is part...
9 days ago klehmanadd a state list for method calling
9 days ago Luke Kenneth Casso... found accidental commenting-out of memory setup in...
9 days ago Luke Kenneth Casso... move debug printout to see whats going on for ldst
9 days ago Luke Kenneth Casso... comments
9 days ago Luke Kenneth Casso... Revert "move coresync clock synchronisation into HDLRunner"
9 days ago Luke Kenneth Casso... call StateRunner constructor, to add to StateRunner...
9 days ago Luke Kenneth Casso... more TODO comments
9 days ago Luke Kenneth Casso... move coresync clock synchronisation into HDLRunner
9 days ago Luke Kenneth Casso... whoops missed one function which should be a yield...
9 days ago Luke Kenneth Casso... use yield from on StateRunners
9 days ago Luke Kenneth Casso... add comments, remove unneeded code
9 days ago Luke Kenneth Casso... move pc_i and svstate_i to HDLRunner
9 days ago klehmanadd end_test, minor cleanup, added hdlrun.cleanup(...
9 days ago klehmanmoved pc_i and sv_state to constructor, remove hdl_stat...
9 days ago klehmanchange over run_hdl_state to TestRunner class
9 days ago Luke Kenneth Casso... add dummy call to simrun and end_test()
9 days ago Luke Kenneth Casso... code-comments and dummy functions
9 days ago Luke Kenneth Casso... move contents of run_sim_state into SimRunner run_test...
9 days ago Luke Kenneth Casso... add a SimRunner prepare_for_test and run_test function
9 days ago klehmancomments for test_runner
9 days ago klehmanadded comment to teststate
2021-10-01 Luke Kenneth Casso... move TestRunner to openpower-isa now that it is part...
2021-09-26 klehmanadd a state list for method calling
2021-09-25 Luke Kenneth Casso... found accidental commenting-out of memory setup in...
2021-09-25 Luke Kenneth Casso... move debug printout to see whats going on for ldst
2021-09-25 Luke Kenneth Casso... comments
2021-09-25 Luke Kenneth Casso... Revert "move coresync clock synchronisation into HDLRunner"
2021-09-25 Luke Kenneth Casso... call StateRunner constructor, to add to StateRunner...
2021-09-25 Luke Kenneth Casso... more TODO comments
2021-09-25 Luke Kenneth Casso... move coresync clock synchronisation into HDLRunner
2021-09-25 Luke Kenneth Casso... whoops missed one function which should be a yield...
2021-09-25 Luke Kenneth Casso... use yield from on StateRunners
2021-09-25 Las SafinMerge remote-tracking branch 'upstream/master' into pr
2021-09-25 Luke Kenneth Casso... add comments, remove unneeded code
2021-09-25 Luke Kenneth Casso... move pc_i and svstate_i to HDLRunner
2021-09-25 klehmanadd end_test, minor cleanup, added hdlrun.cleanup(...
2021-09-25 klehmanmoved pc_i and sv_state to constructor, remove hdl_stat...
2021-09-25 klehmanchange over run_hdl_state to TestRunner class
2021-09-25 Luke Kenneth Casso... add dummy call to simrun and end_test()
2021-09-25 Luke Kenneth Casso... code-comments and dummy functions
2021-09-25 Luke Kenneth Casso... move contents of run_sim_state into SimRunner run_test...
2021-09-25 Luke Kenneth Casso... add a SimRunner prepare_for_test and run_test function
2021-09-25 klehmanstart of HDLRunner
2021-09-24 Luke Kenneth Casso... create initial SimRunner
2021-09-24 Luke Kenneth Casso... add shiftrot2 tests to test_issuer.py
2021-09-23 Luke Kenneth Casso... move pc_i and svstate_i inside if self.run_hdl
2021-09-23 Luke Kenneth Casso... more comments
2021-09-23 Luke Kenneth Casso... add in a stack of comments for identifying match-points...
2021-09-23 Luke Kenneth Casso... add option to run ISACaller Sim (or not)
2021-09-23 Luke Kenneth Casso... add a new run_hdl parameter to TestRunner
2021-09-22 Luke Kenneth Casso... completely borked python segfault, workaround to copy...
2021-09-22 Luke Kenneth Casso... add test of expected results against last sim state
2021-09-22 Luke Kenneth Casso... whoops broken run_sim_state function
2021-09-22 Luke Kenneth Casso... split out HDL from Simulator into separate functions
2021-09-22 Luke Kenneth Casso... split out HDL test from Simulator test,
2021-09-22 Luke Kenneth Casso... alter setup_tst_memory to take a test.mem rather than...
2021-09-22 Luke Kenneth Casso... whoops forgot to do with self.subTest()
2021-09-21 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-09-21 klehmanchanged test_runner to use state mem compare
2021-09-21 klehmanchanged over to use state mem compare
2021-09-21 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-09-21 Luke Kenneth Casso... convert HDLState.get_mem() to a dictionary of memory...
2021-09-20 Luke Kenneth Casso... use get_l0_mem in HDLState to get memory data
2021-09-18 Luke Kenneth Casso... allow individual unit tests to be named in test_issuer.py
2021-09-18 Luke Kenneth Casso... always store full memory state (including zeros)
2021-09-18 klehmanadded get_mem
2021-09-17 Luke Kenneth Casso... update comments
2021-09-16 Luke Kenneth Casso... moving teststate_check_regs written by klehman into...
2021-09-15 isengaaraMerge branch 'master' of ssh://git.libre-riscv.org...
2021-09-14 Luke Kenneth Casso... convert to using TestState and State after moving to...
2021-09-14 klehmanfactory add and intro doc string
2021-09-12 Luke Kenneth Casso... use log instead of print
2021-09-12 Luke Kenneth Casso... code comments
2021-09-12 Luke Kenneth Casso... create new function teststate_check_regs which is calle...
2021-09-12 klehmanchanges to utilize full teststate class
2021-09-12 klehmanadded compare function
2021-09-12 klehmanadded factory function for test class creation
2021-09-10 klehmanimplement base class in state class
2021-09-10 klehmanchanges made to utilize teststate class
2021-09-09 klehmanmade sim into generators and some uniformity changes
2021-09-09 klehmanfinished remaining hdl items
2021-09-09 klehmanHDL int reg added
2021-09-09 klehmanmore sim class registers add
2021-09-08 Cesar StraussMonitor exceptions, re-decoding the instruction in...
2021-09-08 klehmaninitial commit of sim state class
2021-09-08 Cesar StraussMonitor the exception input to PowerDecoder2
2021-09-07 Luke Kenneth Casso... fun fixing of get_core_hdl_regs, "yield from"
2021-09-07 Luke Kenneth Casso... move functions to above where they are called
2021-09-07 klehmanbreakout of register collection and compare
2021-09-07 Cesar StraussFix typo.
2021-09-07 Luke Kenneth Casso... add TODO code-comments
2021-09-07 Luke Kenneth Casso... whitespace, add bug ref number to test API
2021-08-29 Luke Kenneth Casso... unnecessary signal rename ivalid_i to ii_valid (reverting)
2021-08-24 Luke Kenneth Casso... replace data_o with o_data and data_i with i_data as...
2021-08-24 Luke Kenneth Casso... big rename, global/search/replace of ready_o with o_rea...
2021-08-17 Cesar StraussEnable LD/ST exception test case
2021-08-16 Cesar StraussAdjust PortInterface traces according to MMU option
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