git.libre-soc.org Git - soc.git/history - src/soc/simulator/test

[soc.git] / src / soc / simulator / test_sim.py

2020-04-20	Tobias Platen	testcase fo mulli	blob \| commitdiff \| raw
2020-04-20	Tobias Platen	testcase for addis	blob \| commitdiff \| raw \| diff to current
2020-04-20	Tobias Platen	add with carry cleanup and test case	blob \| commitdiff \| raw \| diff to current
2020-04-17	Jacob Lifshay	Merge branch 'master' of ssh://git.libre-riscv.org...	blob \| commitdiff \| raw \| diff to current
2020-04-09	Tobias Platen	fix 'Object is not an nMigen signal' error in test_sim.py	blob \| commitdiff \| raw \| diff to current
2020-04-06	Jacob Lifshay	Merge branch 'master' of ssh://git.libre-riscv.org...	blob \| commitdiff \| raw \| diff to current
2020-04-06	Jacob Lifshay	Merge branch 'fix-tests'	blob \| commitdiff \| raw \| diff to current
2020-04-06	Jacob Lifshay	almost all tests work	blob \| commitdiff \| raw \| diff to current
2020-03-26	Michael Nolan	Add tests for subfic and neg	blob \| commitdiff \| raw \| diff to current
2020-03-26	Michael Nolan	Sub instruction working	blob \| commitdiff \| raw \| diff to current
2020-03-25	Michael Nolan	Directly compare simulator with qemu	blob \| commitdiff \| raw \| diff to current
2020-03-25	Michael Nolan	Assemble whole program instead of instruction by instru...	blob \| commitdiff \| raw \| diff to current
2020-03-23	Michael Nolan	Implement load and store of bytes, halfwords, and words	blob \| commitdiff \| raw \| diff to current
2020-03-23	Michael Nolan	Add support for extended/indexed ld/st	blob \| commitdiff \| raw \| diff to current
2020-03-23	Michael Nolan	Add memory loads and stores to simulator	blob \| commitdiff \| raw \| diff to current
2020-03-23	Michael Nolan	Begin adding backend simulator	blob \| commitdiff \| raw \| diff to current

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