submodule update
[soc.git] / src /
2020-10-06 Luke Kenneth Casso... add LDSTException to PortInterface
2020-10-06 Luke Kenneth Casso... add sdr bypass routing via JTAG boundary scan
2020-10-06 Jacob Lifshayadd divde regression test
2020-10-06 Jacob Lifshayadd moduw regression test
2020-10-06 Jacob Lifshayadd workaround for nmigen bug #502
2020-10-06 Jacob Lifshayadd modsw regression
2020-10-06 Jacob Lifshayadd test case for divweu regression
2020-10-06 Jacob Lifshayprint regs in hex
2020-10-05 Luke Kenneth Casso... add debug / investigation print statements
2020-10-05 Jacob Lifshay`deepcopy` from cache instead of recreating parsers...
2020-10-05 Jacob Lifshayformat code
2020-10-05 Cole Poiriericache.py fix ispow2() util fn per https://bugs.libre...
2020-10-05 Luke Kenneth Casso... whoops fix syntax error
2020-10-05 Luke Kenneth Casso... whoops fix syntax error
2020-10-05 Luke Kenneth Casso... return test rather than "if test return True else False"
2020-10-05 Luke Kenneth Casso... whitespace
2020-10-05 Luke Kenneth Casso... whitespace
2020-10-05 Cole Poiriericache.py add python asserts that were a TODO commented...
2020-10-05 Cole Poiriericache.py fix formatting, mostly due to reduced indenta...
2020-10-05 Cole Poiriericache.py remove comment that contained the entirety...
2020-10-05 Cole Poiriericache.py move icache_miss WAIT_ACK FSM state into...
2020-10-05 Cole Poiriericache.py move icache_miss CLR_TAG FSM state into metho...
2020-10-05 Cole Poiriericache.py move icache_miss IDLE FSM state into method...
2020-10-05 Jacob Lifshaysimplify create_args
2020-10-05 Jacob LifshaySort returned variables to make sure `overflow` is...
2020-10-05 Jacob Lifshayformat caller.py
2020-10-04 Jacob Lifshaychange div FSM pipeline unit to not have a combinatoria...
2020-10-04 Luke Kenneth Casso... significant reorg of the litex pinspecs to use pinmux...
2020-10-04 Luke Kenneth Casso... submodule update
2020-10-04 Luke Kenneth Casso... remove ls180io import
2020-10-04 Luke Kenneth Casso... move ls180io.py back into ls180.py
2020-10-03 Luke Kenneth Casso... allow i2c to be routed via JTAG
2020-10-03 Luke Kenneth Casso... nope. put it back and connect to platform pads in...
2020-10-03 Luke Kenneth Casso... move iopad litex creation to ls180soc.py
2020-10-03 Luke Kenneth Casso... minor reorg on JTAG, allow alternative pinset dict...
2020-10-03 Jacob Lifshayadd regression testcase
2020-10-02 Cole Poiriericache.py add req_hit_way as arg to icache_comb, actual...
2020-10-01 Cole Poiriericache.py add missing comb signal assignments per https...
2020-10-01 Luke Kenneth Casso... arg CacheRam read output needs delay by 1 cycle
2020-10-01 Luke Kenneth Casso... do not pass cache row array around, just the current row
2020-10-01 Luke Kenneth Casso... revert bug in icache wishbone ack
2020-10-01 Luke Kenneth Casso... add clksel, pll to ls180
2020-10-01 Luke Kenneth Casso... create dummy PLL block, connect up to core and clock...
2020-10-01 Cesar StraussAdd GTKWave document to test_compunit_fsm
2020-09-30 Luke Kenneth Casso... add I2C into ls180
2020-09-30 Luke Kenneth Casso... add ASIC version of I2C Master
2020-09-30 Luke Kenneth Casso... clean up row store and wb adr in icache
2020-09-30 Luke Kenneth Casso... hmm only set wishbone address if ack is actually received
2020-09-30 Luke Kenneth Casso... add more debug prints in icache
2020-09-30 Luke Kenneth Casso... remove more reviewed comments
2020-09-30 Luke Kenneth Casso... remove reviewed comments
2020-09-30 Luke Kenneth Casso... comb on wr_index not sync
2020-09-30 Luke Kenneth Casso... start removing reviewed comments
2020-09-30 Luke Kenneth Casso... use same constant name (confusing otherwise)
2020-09-30 Luke Kenneth Casso... need asserts
2020-09-30 Luke Kenneth Casso... halve the number of icache lines for now
2020-09-30 Luke Kenneth Casso... use Repl rather than for-loop to copy bit
2020-09-30 Luke Kenneth Casso... move loop invariant test out of loop
2020-09-30 Luke Kenneth Casso... reduce size of ilang file by a factor of FIVE
2020-09-30 Luke Kenneth Casso... store tag in temp signal
2020-09-30 Luke Kenneth Casso... reduce gate usage by getting cache row only not entire...
2020-09-30 Luke Kenneth Casso... fix read_tag to use word_select correctly
2020-09-30 Luke Kenneth Casso... forgot to add PLRUs as submodules
2020-09-29 Cole Poiriericache.py fix combinatorial loop with by testing temp...
2020-09-29 Cole Poiriericache.py fix is_last_row_addr, get_next_row_addr
2020-09-29 Cole Poiriericache.py trying to sort out test failure, added r...
2020-09-29 Cole Poiriericache.py fix test stbs_done signal, not stbs_zero...
2020-09-29 Cole Poiriericache.py fix rarange
2020-09-29 Cole Poiriericache.py fixed numerous bugs as specified by lkcl...
2020-09-28 Cole Poiriericache.py use d_out as input to assignment instead...
2020-09-28 Luke Kenneth Casso... reduce not-connected IO pins
2020-09-28 Luke Kenneth Casso... missing pspec
2020-09-28 Luke Kenneth Casso... connect SDRAM dqm to wrdata_mask
2020-09-28 Luke Kenneth Casso... lots of sorting out iopads
2020-09-28 Luke Kenneth Casso... add "nocore" option to build verilog
2020-09-28 Luke Kenneth Casso... switch off internal gpio (testing)
2020-09-28 Luke Kenneth Casso... rewrite ilang file after litex ls180 build
2020-09-28 Luke Kenneth Casso... had to over-ride the wishbone functions on C4M TAP
2020-09-27 Cole Poiriericache.py fix translation mistake
2020-09-27 Cesar StraussConvert yet another few tests to be able to use latest...
2020-09-27 Luke Kenneth Casso... add Makefile for creating ls180.il
2020-09-27 Luke Kenneth Casso... rename sys_clk_i to clk_24_i
2020-09-27 Luke Kenneth Casso... add clock selection mechanism
2020-09-26 Luke Kenneth Casso... DMI-to-JTAG needed to be "sync" to get ack/resp right
2020-09-26 Luke Kenneth Casso... do not use simdec2 in test_pipe_caller
2020-09-26 Luke Kenneth Casso... fix annoying alu test_pipe_caller bug, missing asmcode
2020-09-26 Luke Kenneth Casso... add alternative PowerDecode2 to branch test_pipe_caller
2020-09-26 Cesar StraussConvert a few more tests to be able to use cxxsim
2020-09-26 Luke Kenneth Casso... try svf test of DMI MSR
2020-09-26 Luke Kenneth Casso... make check of LDSTMode.update conditional in PowerDecoder2
2020-09-26 Luke Kenneth Casso... add ls180io.py
2020-09-26 Luke Kenneth Casso... add openocd script to fire off svf test
2020-09-26 Luke Kenneth Casso... get openocd svf test running, replicating jtag test
2020-09-26 Luke Kenneth Casso... put test into "server" mode for connecting with openocd
2020-09-26 Luke Kenneth Casso... create client-server version of jtag debug unit test
2020-09-26 Luke Kenneth Casso... create client-server version of jtag debug unit test
2020-09-26 Luke Kenneth Casso... class-ify jtagremote
2020-09-26 Luke Kenneth Casso... send/receive jtagremote protocol
2020-09-26 Luke Kenneth Casso... basic client/server socket example
2020-09-26 Luke Kenneth Casso... add openocd configs
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