From a3d81a2bea829b5dd29d25ec091c4b380bd7ce47 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 1 Jul 2020 20:41:23 +0100 Subject: [PATCH 1/1] whoops missed some cases in unit test changing ALUHelpers --- src/soc/decoder/isa/caller.py | 5 ++++- src/soc/fu/branch/test/test_pipe_caller.py | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py index b79b9099..d093ad1b 100644 --- a/src/soc/decoder/isa/caller.py +++ b/src/soc/decoder/isa/caller.py @@ -191,7 +191,10 @@ class SPR(dict): if isinstance(key, SelectableInt): key = key.value key = special_sprs.get(key, key) - info = spr_byname[key] + if isinstance(key, int): + info = spr_dict[key] + else: + info = spr_byname[key] if not isinstance(v, SelectableInt): v = SelectableInt(v, info.length) self[key] = v diff --git a/src/soc/fu/branch/test/test_pipe_caller.py b/src/soc/fu/branch/test/test_pipe_caller.py index c2eb0888..2c1e5b0d 100644 --- a/src/soc/fu/branch/test/test_pipe_caller.py +++ b/src/soc/fu/branch/test/test_pipe_caller.py @@ -232,7 +232,7 @@ class TestRunner(FHDLTestCase): inp = yield from get_cu_inputs(dec2, sim) - yield from ALUHelpers.set_fast_cia(branch, dec2, inp) + yield from ALUHelpers.set_cia(branch, dec2, inp) yield from ALUHelpers.set_fast_spr1(branch, dec2, inp) yield from ALUHelpers.set_fast_spr2(branch, dec2, inp) yield from ALUHelpers.set_cr_a(branch, dec2, inp) -- 2.30.2