From e0b4334c7d83dda41d5610239150079f30a2f713 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 6 Oct 2020 18:08:16 +0100 Subject: [PATCH] use pdecode2.do not pdecode2.e in test_pipe_caller tests --- src/soc/fu/alu/test/test_pipe_caller.py | 2 +- src/soc/fu/branch/test/test_pipe_caller.py | 2 +- src/soc/fu/cr/test/test_pipe_caller.py | 2 +- src/soc/fu/logical/test/test_pipe_caller.py | 2 +- src/soc/fu/mul/test/test_pipe_caller.py | 2 +- src/soc/fu/shift_rot/test/test_pipe_caller.py | 2 +- src/soc/fu/spr/test/test_pipe_caller.py | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) diff --git a/src/soc/fu/alu/test/test_pipe_caller.py b/src/soc/fu/alu/test/test_pipe_caller.py index b065118a..92c12f63 100644 --- a/src/soc/fu/alu/test/test_pipe_caller.py +++ b/src/soc/fu/alu/test/test_pipe_caller.py @@ -392,7 +392,7 @@ class TestRunner(unittest.TestCase): pspec = ALUPipeSpec(id_wid=2) m.submodules.alu = alu = ALUBasePipe(pspec) - comb += alu.p.data_i.ctx.op.eq_from_execute1(pdecode2.e) + comb += alu.p.data_i.ctx.op.eq_from_execute1(pdecode2.do) comb += alu.n.ready_i.eq(1) comb += pdecode2.dec.raw_opcode_in.eq(instruction) sim = Simulator(m) diff --git a/src/soc/fu/branch/test/test_pipe_caller.py b/src/soc/fu/branch/test/test_pipe_caller.py index 2e4d7a89..cf13bcf2 100644 --- a/src/soc/fu/branch/test/test_pipe_caller.py +++ b/src/soc/fu/branch/test/test_pipe_caller.py @@ -158,7 +158,7 @@ class TestRunner(unittest.TestCase): pspec = BranchPipeSpec(id_wid=2) m.submodules.branch = branch = BranchBasePipe(pspec) - comb += branch.p.data_i.ctx.op.eq_from_execute1(pdecode2.e) + comb += branch.p.data_i.ctx.op.eq_from_execute1(pdecode2.do) comb += branch.p.valid_i.eq(1) comb += branch.n.ready_i.eq(1) comb += pdecode2.dec.raw_opcode_in.eq(instruction) diff --git a/src/soc/fu/cr/test/test_pipe_caller.py b/src/soc/fu/cr/test/test_pipe_caller.py index 7e0df81e..b3b12e1d 100644 --- a/src/soc/fu/cr/test/test_pipe_caller.py +++ b/src/soc/fu/cr/test/test_pipe_caller.py @@ -353,7 +353,7 @@ class TestRunner(unittest.TestCase): pspec = CRPipeSpec(id_wid=2) m.submodules.alu = alu = CRBasePipe(pspec) - comb += alu.p.data_i.ctx.op.eq_from_execute1(pdecode2.e) + comb += alu.p.data_i.ctx.op.eq_from_execute1(pdecode2.do) comb += alu.n.ready_i.eq(1) comb += pdecode2.dec.raw_opcode_in.eq(instruction) sim = Simulator(m) diff --git a/src/soc/fu/logical/test/test_pipe_caller.py b/src/soc/fu/logical/test/test_pipe_caller.py index f5f319fa..8508a4a2 100644 --- a/src/soc/fu/logical/test/test_pipe_caller.py +++ b/src/soc/fu/logical/test/test_pipe_caller.py @@ -250,7 +250,7 @@ class TestRunner(FHDLTestCase): pspec = LogicalPipeSpec(id_wid=2) m.submodules.alu = alu = LogicalBasePipe(pspec) - comb += alu.p.data_i.ctx.op.eq_from_execute1(pdecode2.e) + comb += alu.p.data_i.ctx.op.eq_from_execute1(pdecode2.do) comb += alu.n.ready_i.eq(1) comb += pdecode2.dec.raw_opcode_in.eq(instruction) sim = Simulator(m) diff --git a/src/soc/fu/mul/test/test_pipe_caller.py b/src/soc/fu/mul/test/test_pipe_caller.py index 934138a5..8742ef7f 100644 --- a/src/soc/fu/mul/test/test_pipe_caller.py +++ b/src/soc/fu/mul/test/test_pipe_caller.py @@ -202,7 +202,7 @@ class TestRunner(unittest.TestCase): pspec = MulPipeSpec(id_wid=2) m.submodules.alu = alu = MulBasePipe(pspec) - comb += alu.p.data_i.ctx.op.eq_from_execute1(pdecode2.e) + comb += alu.p.data_i.ctx.op.eq_from_execute1(pdecode2.do) comb += alu.n.ready_i.eq(1) comb += pdecode2.dec.raw_opcode_in.eq(instruction) sim = Simulator(m) diff --git a/src/soc/fu/shift_rot/test/test_pipe_caller.py b/src/soc/fu/shift_rot/test/test_pipe_caller.py index 82e05e98..990d6b0a 100644 --- a/src/soc/fu/shift_rot/test/test_pipe_caller.py +++ b/src/soc/fu/shift_rot/test/test_pipe_caller.py @@ -290,7 +290,7 @@ class TestRunner(unittest.TestCase): pspec = ShiftRotPipeSpec(id_wid=2) m.submodules.alu = alu = ShiftRotBasePipe(pspec) - comb += alu.p.data_i.ctx.op.eq_from_execute1(pdecode2.e) + comb += alu.p.data_i.ctx.op.eq_from_execute1(pdecode2.do) comb += alu.n.ready_i.eq(1) comb += pdecode2.dec.raw_opcode_in.eq(instruction) sim = Simulator(m) diff --git a/src/soc/fu/spr/test/test_pipe_caller.py b/src/soc/fu/spr/test/test_pipe_caller.py index e939a699..f2bc03c7 100644 --- a/src/soc/fu/spr/test/test_pipe_caller.py +++ b/src/soc/fu/spr/test/test_pipe_caller.py @@ -245,7 +245,7 @@ class TestRunner(unittest.TestCase): pspec = SPRPipeSpec(id_wid=2) m.submodules.alu = alu = SPRBasePipe(pspec) - comb += alu.p.data_i.ctx.op.eq_from_execute1(pdecode2.e) + comb += alu.p.data_i.ctx.op.eq_from_execute1(pdecode2.do) comb += alu.p.valid_i.eq(1) comb += alu.n.ready_i.eq(1) comb += pdecode2.dec.raw_opcode_in.eq(instruction) -- 2.30.2