2020-05-15 |
Luke Kenneth Casson... | add count leading zero test into logical test_pipe_caller.py
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2020-05-15 |
Luke Kenneth Casson... | link countzero in to Logical pipeline
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2020-05-15 |
Luke Kenneth Casson... | output countzero ilang
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2020-05-15 |
Luke Kenneth Casson... | remove countzero vhdl tb code
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2020-05-15 |
Luke Kenneth Casson... | swap encode responses, 3210 not 0123 for left mode
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2020-05-15 |
Luke Kenneth Casson... | add some more tests to countzero
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2020-05-15 |
Luke Kenneth Casson... | cool! countzero unit test works!
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2020-05-15 |
Luke Kenneth Casson... | code-munging
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2020-05-15 |
Luke Kenneth Casson... | bit of code-morphing of countzero.py
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2020-05-15 |
Luke Kenneth Casson... | make module combinatorial
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2020-05-14 |
Luke Kenneth Casson... | minor cleanup
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2020-05-14 |
Luke Kenneth Casson... | more code-munging
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2020-05-14 |
Luke Kenneth Casson... | random commenting and code-morph of Logical
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2020-05-14 |
Luke Kenneth Casson... | tidy up rotator main stage
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2020-05-14 |
Luke Kenneth Casson... | small code-shuffle
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2020-05-14 |
Luke Kenneth Casson... | update submodule for parity
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2020-05-14 |
Luke Kenneth Casson... | update submodule isa tables to match OP_CMPB moving...
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2020-05-14 |
Luke Kenneth Casson... | add parity test
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2020-05-14 |
Luke Kenneth Casson... | add the ever-weird parity instruction
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2020-05-14 |
Luke Kenneth Casson... | clarify code, use temporary
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2020-05-14 |
Luke Kenneth Casson... | simplify popcount
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2020-05-14 |
Luke Kenneth Casson... | add popcount test
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2020-05-14 |
Luke Kenneth Casson... | add (untested) popcount
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2020-05-14 |
Luke Kenneth Casson... | debug info on assertion
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2020-05-14 |
Luke Kenneth Casson... | add comment about CMP swapping
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2020-05-14 |
Luke Kenneth Casson... | cleanup Logical
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2020-05-14 |
Luke Kenneth Casson... | invert test condition in formal proof of ALU output...
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2020-05-14 |
Luke Kenneth Casson... | move inversion of cmp into output stage by inverting...
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2020-05-14 |
Luke Kenneth Casson... | idea: invert pos/neg test in output stage, uses an...
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2020-05-14 |
Luke Kenneth Casson... | minor experimental rework of LDSTCompUnit to suit score6600...
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2020-05-14 |
Luke Kenneth Casson... | add TODO comments on Logical pipeline
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2020-05-14 |
Luke Kenneth Casson... | whoops assertion that the Logical pipeline Function...
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2020-05-14 |
Luke Kenneth Casson... | move forward to logical pipelines Function type
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2020-05-14 |
Luke Kenneth Casson... | add logical pipeline to Power decode Function enum
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2020-05-13 |
Luke Kenneth Casson... | add TODO placeholders for popcount and parity
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2020-05-13 |
Luke Kenneth Casson... | minor tidyup
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2020-05-13 |
Luke Kenneth Casson... | comments on ALU pipeline
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2020-05-13 |
Luke Kenneth Casson... | update comment on Logical pipeline
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2020-05-13 |
Luke Kenneth Casson... | remove Logical operations from ALU pipeline
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2020-05-13 |
Luke Kenneth Casson... | split out Logical operations into separate pipeline
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2020-05-13 |
Luke Kenneth Casson... | comments (and whitespace
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2020-05-13 |
Luke Kenneth Casson... | restore field decoders (works with BE/LE) in rotator
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2020-05-13 |
Luke Kenneth Casson... | minor cleanup of shift_rot main_stage
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2020-05-13 |
Luke Kenneth Casson... | simplift right_mask and left_mask rotator sub-functions...
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2020-05-13 |
Luke Kenneth Casson... | remove operand c from ALU in/out
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2020-05-12 |
Luke Kenneth Casson... | temporary reorg of reg/immediate reading
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2020-05-12 |
Luke Kenneth Casson... | add 3rd register input to ALUInputData
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2020-05-12 |
Luke Kenneth Casson... | connect LDSTMulti to 6600 Scoreboard
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2020-05-12 |
Luke Kenneth Casson... | when doing LD-immediate only acknowledge register 1...
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2020-05-11 |
Luke Kenneth Casson... | comments from discussion
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2020-05-11 |
Luke Kenneth Casson... | comment input signals
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2020-05-11 |
Luke Kenneth Casson... | cleanup rotator.py
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2020-05-11 |
Luke Kenneth Casson... | add docstring, missing return module
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2020-05-11 |
Luke Kenneth Casson... | start cleanup of rotator.py, Cat order is inverted
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2020-05-11 |
Luke Kenneth Casson... | convert microwatt rotator to nmigen (first draft)
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2020-05-10 |
Luke Kenneth Casson... | use temporary python vars rather than copy signals...
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2020-05-09 |
Luke Kenneth Casson... | sigh ton of syntax errors
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2020-05-09 |
Luke Kenneth Casson... | bit of reorg, trick on add - put carry in into the LSB
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2020-05-09 |
Luke Kenneth Casson... | comment output stage
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2020-05-09 |
Luke Kenneth Casson... | comment maskgen
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2020-05-09 |
Luke Kenneth Casson... | comment where ALUIntermediateData to go
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2020-05-09 |
Luke Kenneth Casson... | TODO on AluIntermediateData
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2020-05-09 |
Luke Kenneth Casson... | missing sticky-overflow pass-through from middle stage
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2020-05-09 |
Luke Kenneth Casson... | pass through sticky-overflow
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2020-05-09 |
Luke Kenneth Casson... | remove unneeded class
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2020-05-09 |
Luke Kenneth Casson... | clarifying comments
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2020-05-09 |
Luke Kenneth Casson... | preliminary test for LD/ST "update" mode working
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2020-05-09 |
Luke Kenneth Casson... | document PowerOp
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2020-05-08 |
Luke Kenneth Casson... | add comments
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2020-05-08 |
Luke Kenneth Casson... | add ALUFirstInputData
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2020-05-08 |
Luke Kenneth Casson... | send address to memory only for one cycle and acknowledge...
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2020-05-08 |
Luke Kenneth Casson... | experimenting
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2020-05-08 |
Luke Kenneth Casson... | working indexed version of LD/ST CompUnit
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2020-05-08 |
Luke Kenneth Casson... | hmmm i think LD/ST Comp Unit might actually be working...
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2020-05-08 |
Luke Kenneth Casson... | almost got LD/ST CompUnit working
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2020-05-08 |
Luke Kenneth Casson... | prototype LD/ST L0 cache/buffer was bouncing address...
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2020-05-07 |
Luke Kenneth Casson... | move unused simulator code out the way
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2020-05-07 |
Luke Kenneth Casson... | testing LD without ST
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2020-05-07 |
Luke Kenneth Casson... | continuing debugging of LD/ST CompUnit FSM and unit...
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2020-05-07 |
Luke Kenneth Casson... | partially-debugged ld/st comp unit using new PortInterface
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2020-05-06 |
Luke Kenneth Casson... | no syntax errors in LDSTCompUnit multi version
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2020-05-06 |
Luke Kenneth Casson... | almost complete LD/ST CompUnit, nearing testing
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2020-05-06 |
Luke Kenneth Casson... | remove unneeded minerva code
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2020-05-06 |
Luke Kenneth Casson... | mention need for DualPortSplitter class
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2020-05-06 |
Luke Kenneth Casson... | more connecting signals for LDSTCompUnit according...
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2020-05-05 |
Luke Kenneth Casson... | begin connecting up signals for LDSTCompUnit
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2020-05-05 |
Luke Kenneth Casson... | new version of LDSTCompUnit
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2020-05-04 |
Luke Kenneth Casson... | comments
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2020-05-04 |
Luke Kenneth Casson... | take out wait for busy in L0BufferCache tests
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2020-05-04 |
Luke Kenneth Casson... | whitespace cleanup
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2020-05-04 |
Luke Kenneth Casson... | bit of a mess, but functional. unit test passes on...
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2020-05-04 |
Luke Kenneth Casson... | hmmm trying to get st to acknowledge properly
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2020-05-04 |
Luke Kenneth Casson... | add links to bugreport and to memory/cache wiki page
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2020-05-04 |
Luke Kenneth Casson... | L0 cache/buffer first unit test, working except for...
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2020-05-04 |
Luke Kenneth Casson... | first cut at "basic" L0 Cache/Buffer (untested), only...
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2020-05-04 |
Luke Kenneth Casson... | document PortInterface, start on "dummy" L0CacheBuffer
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2020-05-04 |
Luke Kenneth Casson... | whitespace
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2020-05-04 |
Luke Kenneth Casson... | better comments on rd/wr pending
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2020-05-03 |
Luke Kenneth Casson... | move unused out of soc directory
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2020-05-03 |
Luke Kenneth Casson... | add comments to power decoder
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