| 2021-02-01 |
Luke Kenneth Casson... | sort out SelectableInt bit-ordering for identifying...
|
commit | commitdiff | tree |
| 2021-02-01 |
Luke Kenneth Casson... | construct the assembly-code prefix and base v3.0B in...
|
commit | commitdiff | tree |
| 2021-01-31 |
Luke Kenneth Casson... | start an ISACaller SVP64 unit test
|
commit | commitdiff | tree |
| 2021-01-31 |
Luke Kenneth Casson... | test SVP64 major opcode, start checking if it is EXT001...
|
commit | commitdiff | tree |
| 2021-01-31 |
Luke Kenneth Casson... | adjusting ISACaller unit test to use ISACaller.setup_one()
|
commit | commitdiff | tree |
| 2021-01-31 |
Luke Kenneth Casson... | fix ISACaller unit test
|
commit | commitdiff | tree |
| 2021-01-31 |
Luke Kenneth Casson... | SVP64 Remap Fields structures for ISACaller
|
commit | commitdiff | tree |
| 2021-01-31 |
Luke Kenneth Casson... | remove sv_rm from PowerDecoder register decoders
|
commit | commitdiff | tree |
| 2021-01-31 |
Luke Kenneth Casson... | add SVSTATE SPR sub-field accessor class to ISACaller
|
commit | commitdiff | tree |
| 2021-01-31 |
Luke Kenneth Casson... | move SVP64 Extra reg decoding into main PowerDecoder...
|
commit | commitdiff | tree |
| 2021-01-31 |
Luke Kenneth Casson... | update submodule
|
commit | commitdiff | tree |
| 2021-01-30 |
Luke Kenneth Casson... | move CR in/out SVP64 EXTRA decoders into PowerDecoder
|
commit | commitdiff | tree |
| 2021-01-30 |
Luke Kenneth Casson... | add SVP64 CR out extending to 7-bit in PowerDecoder2
|
commit | commitdiff | tree |
| 2021-01-30 |
Luke Kenneth Casson... | add SVP64 CR EXTRA field-extension, from 3-bit to 7...
|
commit | commitdiff | tree |
| 2021-01-30 |
Luke Kenneth Casson... | extend CR registers in Decode2ToExecute1Type to 7 bit
|
commit | commitdiff | tree |
| 2021-01-30 |
Luke Kenneth Casson... | add SVP64CRExtra class to PowerDecoder2, turns 3-bit...
|
commit | commitdiff | tree |
| 2021-01-30 |
Luke Kenneth Casson... | split out SVEXTRA field selection/decoding into separate...
|
commit | commitdiff | tree |
| 2021-01-30 |
Luke Kenneth Casson... | whoops update PowerDecoder2 svp64 comments, reg sizes...
|
commit | commitdiff | tree |
| 2021-01-30 |
Luke Kenneth Casson... | add SVP64 EXTRA decoding to RB, RC and RT (out) in...
|
commit | commitdiff | tree |
| 2021-01-30 |
Luke Kenneth Casson... | add first SVP64 7-bit register context decoder to PowerDecoder2
|
commit | commitdiff | tree |
| 2021-01-29 |
Luke Kenneth Casson... | add SVP64RM record to PowerDecoder2
|
commit | commitdiff | tree |
| 2021-01-29 |
Luke Kenneth Casson... | increase register number sizes from 5 to 7
|
commit | commitdiff | tree |
| 2021-01-29 |
Luke Kenneth Casson... | syntax corrections, also size of maxvl was wrong
|
commit | commitdiff | tree |
| 2021-01-29 |
Luke Kenneth Casson... | add SVP64 RM (Remap) Record
|
commit | commitdiff | tree |
| 2021-01-29 |
Luke Kenneth Casson... | adjust SVP64RM class to output more PowerDecoder-friendly...
|
commit | commitdiff | tree |
| 2021-01-29 |
Luke Kenneth Casson... | adjust how register copy/setup is done in PowerDecoder2
|
commit | commitdiff | tree |
| 2021-01-29 |
Luke Kenneth Casson... | add SV etype/ptype to power decoder
|
commit | commitdiff | tree |
| 2021-01-29 |
Luke Kenneth Casson... | whoops syntax error. submodule update
|
commit | commitdiff | tree |
| 2021-01-29 |
Luke Kenneth Casson... | start adding svp64 enums
|
commit | commitdiff | tree |
| 2021-01-29 |
Luke Kenneth Casson... | use new svp64-augmented csv reader in PowerDecoder
|
commit | commitdiff | tree |
| 2021-01-29 |
Luke Kenneth Casson... | whoops missed out "+" on explicit license listing
|
commit | commitdiff | tree |
| 2021-01-28 |
Luke Kenneth Casson... | add SVSTATE to StateRegs
|
commit | commitdiff | tree |
| 2021-01-28 |
Luke Kenneth Casson... | add SVState SPR Record, SVSTATERec
|
commit | commitdiff | tree |
| 2021-01-28 |
Luke Kenneth Casson... | add svp64 CR field identification for EXTRA2/3 decoding
|
commit | commitdiff | tree |
| 2021-01-28 |
Luke Kenneth Casson... | move svp64 reg-decode function to more appropriate...
|
commit | commitdiff | tree |
| 2021-01-28 |
Luke Kenneth Casson... | provide "merger" of SVP64 RM info into v3.0B CSV files
|
commit | commitdiff | tree |
| 2021-01-27 |
Luke Kenneth Casson... | move SVP64RM CSV class to new module
|
commit | commitdiff | tree |
| 2021-01-27 |
Luke Kenneth Casson... | whitespace and shortening of SPR MMU redirection in...
|
commit | commitdiff | tree |
| 2021-01-27 |
Luke Kenneth Casson... | also read LDST RM files
|
commit | commitdiff | tree |
| 2021-01-25 |
Luke Kenneth Casson... | extra comments in svp64
|
commit | commitdiff | tree |
| 2021-01-24 |
Luke Kenneth Casson... | changing svp64 asm syntax to use / instead of . as...
|
commit | commitdiff | tree |
| 2021-01-23 |
Luke Kenneth Casson... | move sanity-checks, add mode into svp64_rm
|
commit | commitdiff | tree |
| 2021-01-23 |
Luke Kenneth Casson... | cleanup on aisle 3 - simplify sv_mode svp64
|
commit | commitdiff | tree |
| 2021-01-23 |
Luke Kenneth Casson... | check src/dest mask exist if zeroing, svp64
|
commit | commitdiff | tree |
| 2021-01-23 |
Luke Kenneth Casson... | add predicate-result svp64 decoding
|
commit | commitdiff | tree |
| 2021-01-23 |
Luke Kenneth Casson... | add svp64 saturation decoding
|
commit | commitdiff | tree |
| 2021-01-23 |
Luke Kenneth Casson... | start decoding modes in svp64
|
commit | commitdiff | tree |
| 2021-01-23 |
Luke Kenneth Casson... | and now for something completely different...
|
commit | commitdiff | tree |
| 2021-01-23 |
Luke Kenneth Casson... | add elwidth encoding svp64, add more debug-print
|
commit | commitdiff | tree |
| 2021-01-23 |
Luke Kenneth Casson... | add svp64 subvl encoding
|
commit | commitdiff | tree |
| 2021-01-23 |
Luke Kenneth Casson... | add in svp64 predicate mask encoding
|
commit | commitdiff | tree |
| 2021-01-23 |
Luke Kenneth Casson... | capture CR 3 and 5 bit sv encodings
|
commit | commitdiff | tree |
| 2021-01-23 |
Luke Kenneth Casson... | start decoding EXTRA2/3
|
commit | commitdiff | tree |
| 2021-01-23 |
Luke Kenneth Casson... | start decoding sv EXTRAs and identifying them
|
commit | commitdiff | tree |
| 2021-01-23 |
Luke Kenneth Casson... | start to read RM CSV files
|
commit | commitdiff | tree |
| 2021-01-23 |
Luke Kenneth Casson... | add beginnings of svp64 assembly translator
|
commit | commitdiff | tree |
| 2021-01-22 |
Luke Kenneth Casson... | add example on how to access regs list for cmp
|
commit | commitdiff | tree |
| 2020-12-28 |
Luke Kenneth Casson... | add CR1 to power_enums
|
commit | commitdiff | tree |
| 2020-12-12 |
Luke Kenneth Casson... | skip madd, not implemented
|
commit | commitdiff | tree |
| 2020-12-09 |
Luke Kenneth Casson... | update submodules
|
commit | commitdiff | tree |
| 2020-12-09 |
Luke Kenneth Casson... | update submodules
|
commit | commitdiff | tree |
| 2020-12-06 |
Luke Kenneth Casson... | attempt to split into two separate GPIO banks due to...
|
commit | commitdiff | tree |
| 2020-12-03 |
Luke Kenneth Casson... | put ls180 litex bus width back to 32 bit temporarily
|
commit | commitdiff | tree |
| 2020-12-03 |
Luke Kenneth Casson... | argh issue with yosys ABC
|
commit | commitdiff | tree |
| 2020-12-03 |
Luke Kenneth Casson... | add 3 more 4k SRAMs, change WB bus width to 64 in ls180...
|
commit | commitdiff | tree |
| 2020-11-22 |
Luke Kenneth Casson... | simplify litex-core wishbone interfaces
|
commit | commitdiff | tree |
| 2020-11-14 |
Luke Kenneth Casson... | sigh, direction wrong in IOtypes litex core
|
commit | commitdiff | tree |
| 2020-11-13 |
Luke Kenneth Casson... | reduce number of nc in ls180 to 24
|
commit | commitdiff | tree |
| 2020-11-13 |
Luke Kenneth Casson... | reduce clkcsel ls180 width (2 pins), rename pll_18...
|
commit | commitdiff | tree |
| 2020-11-13 |
Luke Kenneth Casson... | rename and add pll lock signal to ls180
|
commit | commitdiff | tree |
| 2020-11-13 |
Luke Kenneth Casson... | rename ls180 litex pll_48 output to pll_18
|
commit | commitdiff | tree |
| 2020-11-13 |
Luke Kenneth Casson... | add enable/disable arguments (not ideal but it works...
|
commit | commitdiff | tree |
| 2020-11-13 |
Luke Kenneth Casson... | remove io_in/out now it is not needed for niolib
|
commit | commitdiff | tree |
| 2020-11-10 |
Luke Kenneth Casson... | add build commands to Makefile for versa ecp5
|
commit | commitdiff | tree |
| 2020-11-10 |
Luke Kenneth Casson... | submodule update
|
commit | commitdiff | tree |
| 2020-11-10 |
Luke Kenneth Casson... | remove ClockSelect module, use DummyPLL
|
commit | commitdiff | tree |
| 2020-11-10 |
Luke Kenneth Casson... | add separate DummyPLL module, according to API discussed at
|
commit | commitdiff | tree |
| 2020-11-07 |
Luke Kenneth Casson... | update submodule
|
commit | commitdiff | tree |
| 2020-11-06 |
Luke Kenneth Casson... | sigh sorting out litex pin-connections to sdram
|
commit | commitdiff | tree |
| 2020-11-04 |
Luke Kenneth Casson... | move back to 3.3v on X3 VERSA ECP5 connector
|
commit | commitdiff | tree |
| 2020-11-03 |
Luke Kenneth Casson... | swap jtag pinorder to match ulx3s
|
commit | commitdiff | tree |
| 2020-11-03 |
Luke Kenneth Casson... | change LVCMOS level on versa ecp5 jtag to 2.5v
|
commit | commitdiff | tree |
| 2020-10-30 |
Luke Kenneth Casson... | add JTAG extension to versa_ecp5 then we can use it
|
commit | commitdiff | tree |
| 2020-10-24 |
Luke Kenneth Casson... | submodule update
|
commit | commitdiff | tree |
| 2020-10-22 |
Luke Kenneth Casson... | add query about cross-domain on the JTAG enable of WB
|
commit | commitdiff | tree |
| 2020-10-22 |
Luke Kenneth Casson... | add detection and disable of Instruction Wishbone based...
|
commit | commitdiff | tree |
| 2020-10-22 |
Luke Kenneth Casson... | add detection and disable of LoadStore Wishbone based...
|
commit | commitdiff | tree |
| 2020-10-22 |
Luke Kenneth Casson... | add JTAG enable/disable of wishbone to TestIssuer
|
commit | commitdiff | tree |
| 2020-10-22 |
Luke Kenneth Casson... | add means to JTAG interface to enable/disable "stuff...
|
commit | commitdiff | tree |
| 2020-10-21 |
Luke Kenneth Casson... | fix up asserts (check correct pads/cores)
|
commit | commitdiff | tree |
| 2020-10-16 |
Luke Kenneth Casson... | experiment swapping dummy trap stage over to input
|
commit | commitdiff | tree |
| 2020-10-16 |
Luke Kenneth Casson... | re-enable tests
|
commit | commitdiff | tree |
| 2020-10-16 |
Luke Kenneth Casson... | manually run coresync clock for test issuer
|
commit | commitdiff | tree |
| 2020-10-16 |
Luke Kenneth Casson... | set defaults in pspec
|
commit | commitdiff | tree |
| 2020-10-16 |
Luke Kenneth Casson... | update submodule
|
commit | commitdiff | tree |
| 2020-10-16 |
Luke Kenneth Casson... | add extra (test dummy stage in trap to see if combinatorial...
|
commit | commitdiff | tree |
| 2020-10-16 |
Luke Kenneth Casson... | add LGPLv3+ notice and add copyright holders
|
commit | commitdiff | tree |
| 2020-10-15 |
Luke Kenneth Casson... | add commented-out connection to JTAG in ECP5 litex
|
commit | commitdiff | tree |
| 2020-10-15 |
Luke Kenneth Casson... | wrong pspec variable in selecting pll clock
|
commit | commitdiff | tree |
| 2020-10-15 |
Luke Kenneth Casson... | sorting out missing clock somewhere
|
commit | commitdiff | tree |
| next |
projects / soc.git / search