2 days ago Luke Kenneth... move unused directory out of src, to indicate "ignore... master
2 days ago Jonathan Neuschäferimport setup_i_memory from soc.simple.test.test_runner
2 days ago Jonathan Neuschäfersoc.simple.test: Rename setup_test_memory to avoid...
2 days ago Jonathan NeuschäferRename test_dcache, which can't be invoked by test...
2 days ago Luke Kenneth... simulator/ should not have been added
3 days ago Tobias Platenpartial fix for src/soc/experiment/
4 days ago Tobias Platenpartially fix unit test in
8 days ago Tobias Platencompldst_multi: add debug output for dcbz
10 days ago Tobias Platenadd
11 days ago Tobias Platenldst: cleanup debug outputs
11 days ago Tobias dcbz now working
13 days ago Tobias Platenrevert accidential delete in causing...
13 days ago Tobias do not use problem state
13 days ago Tobias Platenupdate pi_dcbz function
2021-07-19 Tobias Platensrc/soc/config/test/ add more debug outputs
2021-07-19 Tobias more work on unit test
2021-07-15 Luke Kenneth... update TestRunner, SVSTATE is now a class that inherits...
2021-07-14 Luke Kenneth... update SVSTATE to 64 bit length (fortunately very easy)
2021-07-14 Tobias Platenadd more debug outputs, pass dcbz to loadstore/dcache
2021-07-14 Tobias Platendcache: improve debug output
2021-07-12 Luke Kenneth... use standard create_pdecode in TestRunner
2021-07-12 Luke Kenneth... use default decoder, do not pass one in.
2021-07-11 Tobias Platenmore work on
2021-07-11 Tobias Platenpass self.pi.is_dcbz to request
2021-07-11 Tobias Platenimplement pi_dcbz
2021-07-11 Tobias PlatenMerge branch 'master' of ssh://
2021-07-11 Tobias Platenadd (skeleton only)
2021-07-10 Cesar StraussShow some usage of PortInterface in action
2021-07-10 Cesar StraussAdd new traces to the GTKWave document
2021-07-10 Cesar StraussAdd operand producers to the parallel LDST Compunit...
2021-07-10 Cesar StraussDetect unexpected operand fetches and produced results
2021-07-07 Cesar StraussStart of a GTKWave document for the LDST CompUnit paral...
2021-07-04 Cesar StraussBeginning of a class to make a parallel test case for...
2021-06-30 Tobias Platencut down on time by uncommenting data not needed, addin...
2021-06-28 Tobias Platenupdate ldst test case by adding precise timing
2021-06-24 Luke Kenneth... propagate new use_svp64_ldst_dec mode through TestCore...
2021-06-24 Luke Kenneth... add an explicit PowerDecoder.is_svp64_mode flag to...
2021-06-20 Tobias Platendcache: add debug output
2021-06-20 Tobias Platenupdate
2021-06-18 Tobias Platenuncomment test_dcache_random
2021-06-18 Tobias Platensrc/soc/fu/ldst/ keep data for the whole...
2021-06-14 Tobias Platenupdate testcase for ldst
2021-06-10 Luke Kenneth... whoops Popcount datalen too big (wasted bits). reduce
2021-06-09 Luke Kenneth... git submodule update
2021-06-09 Luke Kenneth... disconnect pll clock, connected in peripheral interconnect
2021-06-09 Luke Kenneth... add in/out of ref_clk and pllclk_clk when PLL enabled
2021-06-06 Cesar StraussStart a new self-contained test suite for LDSTCompUnit
2021-06-03 Luke Kenneth... comment out domains that have already been created
2021-06-03 Luke Kenneth... no, do not assign clock to clock!
2021-06-03 Luke Kenneth... rename ref to ref_v in PLL due to ref being a verilog...
2021-06-03 Luke Kenneth... sort out PLL domains but bypass PLL due to lack of...
2021-06-03 Luke Kenneth... use DomainRenamer on all sub-components of TestIssuer
2021-06-03 Luke Kenneth... make core_rst a member of TestIssuerInternal
2021-06-01 Tobias add new test case
2021-05-29 Tobias first version of test_dcache_random()
2021-05-29 Tobias more test_dcache_regression()
2021-05-27 Luke Kenneth... adjust PLL connections looking for coriolis2 issue
2021-05-27 Luke Kenneth... corrections on spblock ack
2021-05-27 Luke Kenneth... classic wishbone mode: must not do ack if already acked
2021-05-26 Luke Kenneth... arse. PLL test_issuer clk_sel_i accidentally only 1...
2021-05-26 Luke Kenneth... remove err feature from sram4k wb
2021-05-26 Luke Kenneth... add ldst PortInterface misalign unit test (underway)
2021-05-26 Luke Kenneth... rename PLL signals
2021-05-25 Tobias fix race condition causing early stop
2021-05-25 Tobias Platenwait_ldok: add debug output count
2021-05-24 Luke Kenneth... whoops sort out name of SPBlock RAM
2021-05-24 Luke Kenneth... change name of submodule to real_pll
2021-05-24 Luke Kenneth... match up PLL names
2021-05-22 Cesar StraussRemove redundant build step
2021-05-22 Cesar StraussInclude missing step in automated build
2021-05-22 Cesar StraussMove the reset code outside of the sub-test
2021-05-22 Luke Kenneth... update submodule
2021-05-22 Luke Kenneth... update PLL to use Instance
2021-05-15 Tobias add dcache regression and random test...
2021-05-14 Luke Kenneth... add radix MMU "miss" test
2021-05-14 Luke Kenneth... clear out request data on return to idle
2021-05-14 Luke Kenneth... sort out LoadStore1 misalignment FSM, also required...
2021-05-14 Luke Kenneth... remove minerva units previously missed in cleanout
2021-05-14 Luke Kenneth... add misaligned load through MMU (which is incorrectly...
2021-05-13 Luke Kenneth... minor rework of wb_get, make generic
2021-05-13 Luke Kenneth... added STORE test in, and it worked...
2021-05-13 Luke Kenneth... update comments in regarding a 4th FSM
2021-05-13 Luke Kenneth... yet more debug log stuff for DCache, this time on Cache...
2021-05-13 Luke Kenneth... fix wb_get error where data was being corrupted
2021-05-13 Luke Kenneth... add read at different locations in
2021-05-13 Luke Kenneth... add some data for MMU to actually look up
2021-05-13 Luke Kenneth... ha, hilarious: swapped TLBUpdate output sizes db_out...
2021-05-13 Luke Kenneth... whoops TLBIE must *clear* the valid bit not set it...
2021-05-13 Luke Kenneth... more debug Display in
2021-05-13 Luke Kenneth... putting in a lot more debug print statements in DCache...
2021-05-12 Luke Kenneth... add dcache tlb / pte test
2021-05-12 Luke Kenneth... set m_out.load from ldst_r(egister) in LoadStore1
2021-05-12 Luke Kenneth... move dcache unit test to separate
2021-05-12 Luke Kenneth... experimentation with MMU-enabled LoadStore1 through...
2021-05-12 Luke Kenneth... add debug info, update comments, disable dcache in...
2021-05-12 Luke Kenneth... start doing virtual memory queries via PortInterface...
2021-05-12 Luke Kenneth... whoops missing default zero (no idea how)
2021-05-12 Luke Kenneth... addcomments for MMU PortInterface test (how it, um...
2021-05-12 Luke Kenneth... bit of a hack to get operational.
2021-05-12 Luke Kenneth... whitespace