soc.git
83 min ago Luke Kenneth... litex expects wishbone "err" signals even if not used master
3 hours ago Luke Kenneth... extend name of sram4k block with _wb suffix
5 hours ago Tobias Platenunit test: pass bool mmu
5 hours ago Luke Kenneth... add comments and more stub functions
6 hours ago Luke Kenneth... add segment_check function, plus quick test.
8 hours ago Luke Kenneth... add decode_prte function to RADIX
8 hours ago Luke Kenneth... add trivial LD/ST redirectors into RADIX ISACaller
10 hours ago Cesar StraussMove writing of the PC state register to the issue FSM
11 hours ago Cesar StraussMove the wait on "core stop" out of fetch, and into...
24 hours ago Luke Kenneth... removing --user from make develop
25 hours ago Luke Kenneth... whitespace
27 hours ago Tobias Platenupdate test_caller_radix.py
27 hours ago Tobias PlatenISACaller: add option mmu
28 hours ago Luke Kenneth... whoops microwatt already allocates SPR 720
28 hours ago Luke Kenneth... add comments from gem5-experimental mmu
28 hours ago Luke Kenneth... add cached pgtbl0/3
28 hours ago Luke Kenneth... add two functions for checking permissions, to be based...
2 days ago Tobias Platenadd RADIX skeleton and unit test
2 days ago Luke Kenneth... add debug strings
2 days ago Luke Kenneth... remove singleton pattern
2 days ago Luke Kenneth... add pywriter Makefile entry
2 days ago Luke Kenneth... cur_state is a global, does not have to be passed as...
2 days ago Luke Kenneth... set SVSTATE in TestRunner using new TestIssuer.svstate_i
2 days ago Luke Kenneth... add svstate_i to TestIssuer which mirrors pc_i
3 days ago Luke Kenneth... comment out changing SPR 720 because 720 is not support...
3 days ago Luke Kenneth... sort out SPR setting in MMU
3 days ago Luke Kenneth... operating correctly, not directing MMU SPRs to SPR...
3 days ago Luke Kenneth... must always set ok for writing out data otherwise it...
4 days ago Luke Kenneth... Revert "fix Bug 607 - unnecessary code added related...
4 days ago Luke Kenneth... move SVP64 RM decoder to separate module
5 days ago Luke Kenneth... add additional SVP64 RM decode fields
5 days ago Luke Kenneth... start on SVP64 RM Mode decoder
5 days ago Luke Kenneth... more SVP64 enums
5 days ago Luke Kenneth... add SVP64 RM sub-field enums
5 days ago Luke Kenneth... move SVP64 Extra decoders to separate module
5 days ago Luke Kenneth... fix syntax error
5 days ago Luke Kenneth... move SVP64PrefixDecoder to separate module
5 days ago Luke Kenneth... add PowerDecoder.no_in_vec
5 days ago Luke Kenneth... add svp64_instrs to power_svp64
5 days ago Tobias Platenfix Bug 607 - unnecessary code added related to MMU...
5 days ago Tobias Platenfix Bug 603 - use SPR names/numbers from sprs.csv
6 days ago Luke Kenneth... use PowerDecoder2.no_out_vec instead of manual vector...
6 days ago Luke Kenneth... add corresponding VL=0 unit test as from 161b7d67b...
6 days ago Cesar StraussAdd traces for the new FSM
7 days ago Cesar StraussAdd a vector case with VL == 0
7 days ago Luke Kenneth... comment on CoreState
7 days ago Luke Kenneth... remove sv_changed input to fetch_fsm, add it to issue_f...
7 days ago Luke Kenneth... moving new_svstate and update_svstate into issue FSM...
7 days ago Luke Kenneth... move fetch_insn_o into issue_fsm TestIssuer
7 days ago Luke Kenneth... add comments, missing that VL loop ends after execution...
7 days ago Cesar StraussImplement a decode/issue FSM between fetch and execute
9 days ago Tobias Platenwb_get: write outputs to seperate logfile too
9 days ago Tobias Platenupdate mmu testcase
9 days ago Tobias Platentest_runner.py: add needed imports
9 days ago Luke Kenneth... add comments explaining split
9 days ago Luke Kenneth... move DecodeCROut/In (at last) out of PowerDecoderSubset...
9 days ago Luke Kenneth... start making write_cr0 independent of DecodeCROut
10 days ago Tobias Platendeduplicate
10 days ago Luke Kenneth... add note that SVSTATE has changed, this will allow...
11 days ago Cesar StraussFix typo when calculating PowerDecoder2.no_out_vec
11 days ago Luke Kenneth... move setting of NIA into fetch FSM in TestIssuer
11 days ago Luke Kenneth... whoops
11 days ago Luke Kenneth... moving PC-setting (NIA) out of execute_fsm in TestIssuer
11 days ago Luke Kenneth... rename inter-FSM handshake signals in TestIssuer
12 days ago Luke Kenneth... err trying to put in some FSM handshake signals, gettin...
12 days ago Luke Kenneth... comment for where SVSTATE FSM should go
12 days ago Luke Kenneth... add CR out vector detection to PowerDecoder2 no_out_vec
12 days ago Cesar StraussThe field selection function was moved to nmutil.util
12 days ago Cesar StraussHide the register augmentation traces by default
12 days ago Luke Kenneth... move execute_fsm to separate function in TestIssuer
12 days ago Luke Kenneth... move fetch_fsm to separate function in TestIssuer
12 days ago Luke Kenneth... add JTAG enable/disable of 4k SRAMs
12 days ago Cesar StraussThe new version of "sel" is smart enough to find a...
12 days ago Luke Kenneth... add comments for Mode field in SVP64Asm
12 days ago Luke Kenneth... comments in SVP64RMFields
12 days ago Cesar StraussUse the new selection field function from nmutil
12 days ago Cesar StraussUse symbolic values as field sizes
12 days ago Cesar StraussReplace all hardcoded shifts into RM by usage of SVP64R...
12 days ago Luke Kenneth... create SVP64CROffs consts for when SVP64 Vector-of...
12 days ago Luke Kenneth... comments on sv.add. Rc=1 unit test
12 days ago Luke Kenneth... add in Vectorised CRs when Rc=1 into ISACaller
12 days ago Luke Kenneth... add CR1 to DecodeCRIn/Out
13 days ago Luke Kenneth... add some debug checking to get_pdecode_cr_out
13 days ago Luke Kenneth... add crossreference to bug #603
13 days ago Luke Kenneth... add more debug output to get_pdecode_cr_out
13 days ago Cesar StraussActually forward the field width to field_slice()
13 days ago Cesar StraussAssemble the SV64 prefix from its subfields using SVP64...
13 days ago Luke Kenneth... start on CRs in SVP64 mode
13 days ago Luke Kenneth... fix SVP64Asm Rc=1 assembly
13 days ago Luke Kenneth... add black-box attribute to 4k SRAM cell
13 days ago Cesar StraussFix more MSB0 issues in comments
13 days ago Cesar StraussReplace more hardcoded constants with symbolic field...
13 days ago Luke Kenneth... increment CRs based on srcstep, see what happens
13 days ago Luke Kenneth... add litex wishbone interconnect to 4x 4k SRAMs
13 days ago Luke Kenneth... add QTY 4of 4k SRAMs SPBlock512W64B8W to TestIssuer...
13 days ago Luke Kenneth... add option for QTY 4x 4k SRAM blocks (not added yet...
13 days ago Luke Kenneth... add Wishbone-wrapped SPBlock_512W64B8W
13 days ago Luke Kenneth... whoops set ROM to none by mistake
13 days ago Luke Kenneth... whoops spelling error
13 days ago Luke Kenneth... add (unused) code for writing out SVSTATE in TestIssuer
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