soc.git
2021-03-10 Tobias Platenradix: reading first page table entry
2021-03-10 Luke Kenneth... add walk_tree arguments it needs
2021-03-09 Luke Kenneth... fix address must convert to SelectableInt
2021-03-09 Luke Kenneth... call decode_ptre on address to obtain shift, mbits...
2021-03-09 Tobias Platenwhitespace
2021-03-09 Tobias PlatenRADIX: call self._walk_tree in ld and st
2021-03-09 Luke Kenneth... debug radix mmu ISACaller
2021-03-09 Tobias Platencomment out broken spr code
2021-03-09 Tobias Platen_walk_tree: access sprs
2021-03-09 Luke Kenneth... create first check_perms RADIX ISACaller function
2021-03-09 Luke Kenneth... move Mem class out of ISACaller
2021-03-09 Luke Kenneth... cleanup imports
2021-03-09 Luke Kenneth... move ISACaller RADIX MMU class to separate module
2021-03-09 Luke Kenneth... add pgtable and pte calculation to RADIX ISACaller
2021-03-09 Cesar StraussEnable VL==0 vector instruction skip test case
2021-03-09 Cesar StraussAdd some extra debug traces to the GTKWave document
2021-03-09 Cesar StraussCreate a new signal for the Simulator to wait on
2021-03-08 Luke Kenneth... start adding _get_prtable_addr
2021-03-08 Luke Kenneth... actually make it possible to disable svp64 on commandli...
2021-03-08 Luke Kenneth... add option in TestRunner to disable svp64 via commandli...
2021-03-08 Luke Kenneth... add option to cut out SVP64 from PowerDecoder2
2021-03-08 Luke Kenneth... correct comments in sv.add rc=1
2021-03-08 Cesar StraussRemove the unused internal insn_done signal
2021-03-08 Cesar StraussFix argument order to match function declaration
2021-03-07 Cesar StraussFix missing NIA update on ISACaller
2021-03-07 Luke Kenneth... whoops should be "make gitupdate"
2021-03-07 Tobias PlatenRADIX: read SPRs
2021-03-07 Tobias PlatenRADIX: implement memassign and call
2021-03-07 Luke Kenneth... add SVSTATE read to DMI interface
2021-03-07 Cesar StraussMerge WAIT_RESET into INSN_FETCH on the Issue FSM
2021-03-07 Luke Kenneth... move DMI stuff to separate function in issuer.py
2021-03-07 Luke Kenneth... update comments in issuer.py
2021-03-07 Luke Kenneth... add Rc=1 SVP64 unit test to svp64_cases.py
2021-03-07 Cesar StraussImplement the VL==0 loop
2021-03-06 Cesar StraussAllow updating the PC and SVSTATE registers while stopped
2021-03-06 Cesar StraussEnable the Simple-V loop test case
2021-03-06 Cesar StraussBegin to implement the Simple-V loop
2021-03-06 Cesar StraussDo not reset pc_changed and sv_changed at instruction end
2021-03-06 Cesar StraussMake the raw opcode input port of the decoder stay...
2021-03-06 Luke Kenneth... remove blackbox attribute on SPBlock_512W64B8W
2021-03-06 Luke Kenneth... add SPBlock_512W64B8W.v blackbox file
2021-03-05 Luke Kenneth... remove sram4k wishbone bte/cti in litex interconnect
2021-03-05 Luke Kenneth... litex expects wishbone "err" signals even if not used
2021-03-05 Luke Kenneth... extend name of sram4k block with _wb suffix
2021-03-05 Tobias Platenunit test: pass bool mmu
2021-03-05 Luke Kenneth... add comments and more stub functions
2021-03-05 Luke Kenneth... add segment_check function, plus quick test.
2021-03-05 Luke Kenneth... add decode_prte function to RADIX
2021-03-05 Luke Kenneth... add trivial LD/ST redirectors into RADIX ISACaller
2021-03-05 Cesar StraussMove writing of the PC state register to the issue FSM
2021-03-05 Cesar StraussMove the wait on "core stop" out of fetch, and into...
2021-03-04 Luke Kenneth... removing --user from make develop
2021-03-04 Luke Kenneth... whitespace
2021-03-04 Tobias Platenupdate test_caller_radix.py
2021-03-04 Tobias PlatenISACaller: add option mmu
2021-03-04 Luke Kenneth... whoops microwatt already allocates SPR 720
2021-03-04 Luke Kenneth... add comments from gem5-experimental mmu
2021-03-04 Luke Kenneth... add cached pgtbl0/3
2021-03-04 Luke Kenneth... add two functions for checking permissions, to be based...
2021-03-03 Tobias Platenadd RADIX skeleton and unit test
2021-03-03 Luke Kenneth... add debug strings
2021-03-03 Luke Kenneth... remove singleton pattern
2021-03-03 Luke Kenneth... add pywriter Makefile entry
2021-03-03 Luke Kenneth... cur_state is a global, does not have to be passed as...
2021-03-03 Luke Kenneth... set SVSTATE in TestRunner using new TestIssuer.svstate_i
2021-03-03 Luke Kenneth... add svstate_i to TestIssuer which mirrors pc_i
2021-03-02 Luke Kenneth... comment out changing SPR 720 because 720 is not support...
2021-03-02 Luke Kenneth... sort out SPR setting in MMU
2021-03-02 Luke Kenneth... operating correctly, not directing MMU SPRs to SPR...
2021-03-02 Luke Kenneth... must always set ok for writing out data otherwise it...
2021-03-01 Luke Kenneth... Revert "fix Bug 607 - unnecessary code added related...
2021-03-01 Luke Kenneth... move SVP64 RM decoder to separate module
2021-02-28 Luke Kenneth... add additional SVP64 RM decode fields
2021-02-28 Luke Kenneth... start on SVP64 RM Mode decoder
2021-02-28 Luke Kenneth... more SVP64 enums
2021-02-28 Luke Kenneth... add SVP64 RM sub-field enums
2021-02-28 Luke Kenneth... move SVP64 Extra decoders to separate module
2021-02-28 Luke Kenneth... fix syntax error
2021-02-28 Luke Kenneth... move SVP64PrefixDecoder to separate module
2021-02-28 Luke Kenneth... add PowerDecoder.no_in_vec
2021-02-28 Luke Kenneth... add svp64_instrs to power_svp64
2021-02-28 Tobias Platenfix Bug 607 - unnecessary code added related to MMU...
2021-02-28 Tobias Platenfix Bug 603 - use SPR names/numbers from sprs.csv
2021-02-27 Luke Kenneth... use PowerDecoder2.no_out_vec instead of manual vector...
2021-02-27 Luke Kenneth... add corresponding VL=0 unit test as from 161b7d67b...
2021-02-27 Cesar StraussAdd traces for the new FSM
2021-02-26 Cesar StraussAdd a vector case with VL == 0
2021-02-26 Luke Kenneth... comment on CoreState
2021-02-26 Luke Kenneth... remove sv_changed input to fetch_fsm, add it to issue_f...
2021-02-26 Luke Kenneth... moving new_svstate and update_svstate into issue FSM...
2021-02-26 Luke Kenneth... move fetch_insn_o into issue_fsm TestIssuer
2021-02-26 Luke Kenneth... add comments, missing that VL loop ends after execution...
2021-02-26 Cesar StraussImplement a decode/issue FSM between fetch and execute
2021-02-24 Tobias Platenwb_get: write outputs to seperate logfile too
2021-02-24 Tobias Platenupdate mmu testcase
2021-02-24 Tobias Platentest_runner.py: add needed imports
2021-02-24 Luke Kenneth... add comments explaining split
2021-02-24 Luke Kenneth... move DecodeCROut/In (at last) out of PowerDecoderSubset...
2021-02-24 Luke Kenneth... start making write_cr0 independent of DecodeCROut
2021-02-23 Tobias Platendeduplicate
next