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Add register assertions, fix broken tests
[soc.git] / src / soc / simulator /
drwxr-xr-x   ..
-rw-r--r-- 967 gas.py blob | history | raw
-rw-r--r-- 134 memmap blob | history | raw
-rw-r--r-- 2428 program.py blob | history | raw
-rw-r--r-- 2114 qemu.py blob | history | raw
drwxr-xr-x - qemu_test tree | history
-rw-r--r-- 4788 test_sim.py blob | history | raw