experiments12/SPBlock_512W64B8W.vbe

   1
   2 -- Phony VHDL interface for SRAM block.
   3
   4 entity SPBlock_512W64B8W is
   5    port ( clk     : in  bit
   6         ; we      : in  bit_vector( 7 downto 0)
   7         ; a       : in  bit_vector( 8 downto 0)
   8         ; d       : in  bit_vector(63 downto 0)
   9         ; q       : out bit_vector(63 downto 0)
  10         ; vdd     : in  bit
  11         ; vss     : in  bit
  12         );
  13 end SPBlock_512W64B8W;
  14
  15 architecture behavioral of SPBlock_512W64B8W is
  16
  17 begin
  18
  19 end behavioral;