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(parent: bbd0787) | patch
Rebame root clock signal from "core.por_clk" into "core.pll_clk".
authorJean-Paul Chaput <Jean-Paul.Chaput@lip6.fr>
Thu, 10 Jun 2021 09:17:20 +0000 (11:17 +0200)
committerJean-Paul Chaput <Jean-Paul.Chaput@lip6.fr>
Thu, 10 Jun 2021 09:17:20 +0000 (11:17 +0200)
commit940baa5333f529f7a3461f5a1b510dbc1c231292
tree4ba235bc563ed84447e47c7d4a516a66ad0dea23tree
parentbbd0787b0f04dbc8078a4ffbfc1c203af1438ed5commit | diff
Rebame root clock signal from "core.por_clk" into "core.pll_clk".
experiments9/tsmc_c018/doDesign.py diff | blob | history