P&R tweaks for routing convergence.

diff --git a/experiments9/tsmc_c018/doDesign.py b/experiments9/tsmc_c018/doDesign.py
index f4aa02fe9c475cf967199d56cd7b506a1d0fc201..432213eef840cf698723d94831230f45a8fb6e19 100644 (file)
--- a/experiments9/tsmc_c018/doDesign.py
+++ b/experiments9/tsmc_c018/doDesign.py
@@ -206,12 +206,12 @@ def scriptMain (**kw):
         ls180Conf.cfg.etesian.uniformDensity = True
         ls180Conf.cfg.etesian.aspectRatio = 1.0
         ls180Conf.cfg.etesian.spaceMargin = 0.05
-        ls180Conf.cfg.anabatic.searchHalo = 2
+        ls180Conf.cfg.anabatic.searchHalo = 3
         ls180Conf.cfg.anabatic.globalIterations = 20
         ls180Conf.cfg.anabatic.topRoutingLayer = 'METAL5'
         ls180Conf.cfg.katana.hTracksReservedLocal = 9
         ls180Conf.cfg.katana.vTracksReservedLocal = 5
-        ls180Conf.cfg.katana.hTracksReservedMin = 6
+        ls180Conf.cfg.katana.hTracksReservedMin = 8
         ls180Conf.cfg.katana.vTracksReservedMin = 4
         ls180Conf.cfg.katana.runRealignStage = True
         ls180Conf.cfg.block.spareSide = u(7*13)