add cki and ck to clock settings

diff --git a/experiments9/coriolis2/settings.py b/experiments9/coriolis2/settings.py
index 1d248077da59be98ff3fddadb4868c67d2d38572..e96402167924ce1820e7e3b17fc5a9635b1ced31 100644 (file)
--- a/experiments9/coriolis2/settings.py
+++ b/experiments9/coriolis2/settings.py
@@ -61,7 +61,7 @@ with CfgCache('', priority=Cfg.Parameter.Priority.UserFile) as cfg:
 env = CRL.AllianceFramework.get().getEnvironment()
 #env.setCLOCK ('^sys_clk.*|^sys_rst.*')
 #env.setCLOCK ('^clk$|^rst$|ck|cki')
-env.setCLOCK ('^sys_clk.*')
+env.setCLOCK ('^sys_clk.*|^cki$|^ck$')
 #env.setCLOCK ('clk|ck|cki')
 env.setPOWER ('vdd')
 env.setGROUND('vss')