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use METAL10 for topRoutingLayer
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 13 Apr 2021 18:52:42 +0000 (18:52 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 13 Apr 2021 18:52:42 +0000 (18:52 +0000)
experiments10_verilog/freepdk_c4m45/doDesign.py patch | blob | history

diff --git a/experiments10_verilog/freepdk_c4m45/doDesign.py b/experiments10_verilog/freepdk_c4m45/doDesign.py
index 262884269ec43445ce154903a1fbaa0f5ae77ff9..613e7e3fdad35b4dd2f6c75ccd1a62951bfb3bf6 100644 (file)
--- a/experiments10_verilog/freepdk_c4m45/doDesign.py
+++ b/experiments10_verilog/freepdk_c4m45/doDesign.py
@@ -77,7 +77,7 @@ def scriptMain ( **kw ):
         adderConf.cfg.anabatic.searchHalo = 2
         adderConf.cfg.anabatic.globalIterations = 20
         adderConf.cfg.anabatic.routingGauge = 'FlexLib'
-        adderConf.cfg.anabatic.topRoutingLayer = 'METAL5'
+        adderConf.cfg.anabatic.topRoutingLayer = 'METAL10'
         adderConf.cfg.block.spareSide = u(7*13)
         #adderConf.cfg.chip.padCoreSide = 'North'
         adderConf.cfg.chip.supplyRailWidth = u(35)