soclayout.git
5 days ago Jean-Paul ChaputKeep track of the latest debugged nets (antenna & DRC). master
5 days ago Jean-Paul ChaputAdd logos in the bottom left corner and supress iovss...
8 days ago Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
8 days ago Luke Kenneth... add wget of libresoc gds logo
8 days ago Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
8 days ago Jean-Paul ChaputAdjust router track reservations for convergence.
9 days ago Luke Kenneth... add sorbonne logo to wget
9 days ago Luke Kenneth... hmm set spacemargin back to 0.05
10 days ago Luke Kenneth... experiment with same settings as benchs/6502
11 days ago Luke Kenneth... attempt to put together a GDSII loader file. errr...
11 days ago Luke Kenneth... add fetch of GDS-II files
11 days ago Luke Kenneth... add fetch of GDS-II files
13 days ago Luke Kenneth... reverse pingroup SDRAM address to get it closer to...
13 days ago Luke Kenneth... redo pinmux, mirror image some pins
13 days ago Luke Kenneth... submodule update
13 days ago Luke Kenneth... add spimaster to peripheral system, all names changed...
13 days ago Luke Kenneth... updated non_generated pinmap json file
13 days ago Luke Kenneth... updated non_generated pinmap json file
13 days ago Luke Kenneth... update submodule
13 days ago Luke Kenneth... argh, nsxlib does not have analog. have to cheat
13 days ago Luke Kenneth... submodule update
13 days ago Jean-Paul ChaputRebame root clock signal from "core.por_clk" into ...
2021-06-09 Luke Kenneth... sys_clk renamed to sys_pllclk, iopads load from copy...
2021-06-09 Luke Kenneth... add litex pinpads JSON file to nongenerated
2021-06-09 Luke Kenneth... doh, should have reduced NC by 16
2021-06-09 Luke Kenneth... pll24_i renamed to clk_24_i
2021-06-09 Luke Kenneth... pllclk_o is renamed to pllclk_clk
2021-06-09 Luke Kenneth... use sys_pllclk_from_pad not sys_clk_from_pad
2021-06-09 Luke Kenneth... sys_clk renamed to sys_pllclk
2021-06-09 Luke Kenneth... reorg of PLL, routed out into peripheral interconnect
2021-06-09 Jean-Paul ChaputI/O pads reorganisation, 32 per side (except for NORTH).
2021-06-09 Jean-Paul ChaputP&R tweaks for routing convergence.
2021-06-09 Jean-Paul ChaputAdd a case in the build script to fit my environment...
2021-06-09 Jean-Paul ChaputRemove files that are now copied from other locations.
2021-06-08 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-06-08 Jean-Paul ChaputAdpapt e9/TSMC doDesign to the new size of the SRAMs...
2021-06-06 Luke Kenneth... argh, nsxlib cannot cope with 3 clocks!
2021-06-05 Luke Kenneth... add vss/vdd as pins, gets the net into the VST
2021-06-05 Luke Kenneth... set power type in fake pll vdd/vss
2021-06-05 Luke Kenneth... whoops, fake pll/mem need vss/vdd
2021-06-05 Luke Kenneth... whoops naming pads different from nets is important
2021-06-05 Luke Kenneth... sigh trying to find the right clock line
2021-06-05 Luke Kenneth... more comments
2021-06-05 Luke Kenneth... comment about por_clk
2021-06-05 Luke Kenneth... correct clock name for H-Tree in ls180
2021-06-05 Luke Kenneth... sort out clock names in experiments10_verilog
2021-06-05 Luke Kenneth... add coresync_clk to list of HTree
2021-06-05 Luke Kenneth... add dummy pll to experiments10_verilog
2021-06-05 Luke Kenneth... set various clocks to use H-Tree
2021-06-05 Luke Kenneth... add dummy (fake) PLL to experiments10_verilog for testing
2021-06-04 Jean-Paul ChaputUpdated experiments12 for the latest Coriolis.
2021-06-04 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-06-04 Jean-Paul ChaputUpdated configuration suited for experiment9/tsmc_c018.
2021-06-03 Luke Kenneth... add 4ksram recon script in tsmc_c018 as well
2021-06-03 Luke Kenneth... add build_full_4ksram_recon.sh to copy over Staf re...
2021-06-03 Luke Kenneth... rename sys_clk to sys_clk_0 and rename ref_clk to sys_clk
2021-06-03 Staf VerhaegenReroute clk so PLL output clock is used as sys_clk.
2021-06-03 Staf VerhaegenDuplicate file before patching for clock rerouting.
2021-06-03 Luke Kenneth... rename ref in fake-pll to ref_v
2021-06-03 Luke Kenneth... update libresoc.v to use sys_clk for main core
2021-06-03 Luke Kenneth... change ref to ref_v in PLL (keyword)
2021-05-27 Luke Kenneth... set other nets to input in fake 4k SRAM cell
2021-05-27 Luke Kenneth... add TODO into tsmc_c018 coriolis2 settings.py
2021-05-27 Luke Kenneth... update libresoc.v
2021-05-27 Luke Kenneth... set fake-mem LibreSOCMem output q as a Net Output
2021-05-27 Luke Kenneth... set fake PLL Master Cell directions explicitly
2021-05-26 Luke Kenneth... clk_sel_i in TestIssuer was one bit not 2
2021-05-26 Luke Kenneth... remove sram4k wb err (unused anyway)
2021-05-26 Luke Kenneth... appears to be missing libresoc from NETLISTS in Makefile
2021-05-25 Luke Kenneth... attempt better grid alignment for fake cells
2021-05-25 Luke Kenneth... change cell sizes to grid layout (?)
2021-05-25 Luke Kenneth... increase not-connected pads by one
2021-05-25 Luke Kenneth... add fake pll symlink
2021-05-25 Luke Kenneth... rename pll out signal to out_v in "fake" pll cell
2021-05-25 Luke Kenneth... rename PLL out to out_v in test_issuer
2021-05-25 Luke Kenneth... rename pll blackbox out to out_v
2021-05-24 Luke Kenneth... disappearing signal from pll, attempt to get it back
2021-05-24 Luke Kenneth... remove "*" net from fake-pll cell, it ends up in the...
2021-05-24 Luke Kenneth... round to 0.135 cell grid?
2021-05-24 Luke Kenneth... rename cell to "real_pll" to avoid conflict with cell...
2021-05-24 Luke Kenneth... add dummy/fake/ghost PLL blackbox cell
2021-05-22 Luke Kenneth... rename PLL pad names
2021-05-22 Luke Kenneth... correct PLL names
2021-05-22 Luke Kenneth... re-add 4k sram
2021-05-22 Luke Kenneth... annoying rename of pll analog pin
2021-05-22 Luke Kenneth... manually rename ls180sram4k module to ls180
2021-05-22 Luke Kenneth... submodule update
2021-05-22 Luke Kenneth... update PLL to use submodule Instance
2021-04-30 Luke Kenneth... do an SRAM search by looking for matching along the...
2021-04-30 Luke Kenneth... 4k sram build
2021-04-30 Luke Kenneth... use "make view" not "make vst"
2021-04-30 Luke Kenneth... add fake LibreSOCMem library to freepdk_c4m45
2021-04-30 Luke Kenneth... add symlink to "fake" LibreSOCMem
2021-04-30 Luke Kenneth... enabling experiments9 new LibreSOCMem fake blackbox...
2021-04-30 Luke Kenneth... using renamed (single) spblock_512w64b8w
2021-04-30 Luke Kenneth... using new single spblock_512xxx in experiments9
2021-04-30 Luke Kenneth... add complete series of pins onto fake SRAM
2021-04-28 Luke Kenneth... first experiment creating a LibreSOCMem library with...
2021-04-28 Luke Kenneth... create function which pre-creates the blackbox cells
2021-04-28 Luke Kenneth... name everything back to spblock_512w64b8w now that...
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