always_comb: handle if/else blocks
[sv2nmigen.git] / examples / assignment2.sv
1 module assignment(
2 output o,
3 input i
4 );
5 wire x,y;
6 wire [15:0] z;
7 assign x = i;
8 assign o = x;
9
10 assign plusexp = x + y;
11 assign minusexp = x - y;
12 assign multexp = x * y;
13 assign divexp = x / y;
14 assign modexp = x % y;
15
16 assign gtexp = x > y;
17 assign ltexp = x < y;
18 assign geexp = x >= y;
19 assign leexp = x <= y;
20
21 assign eq_short = x == y;
22 assign neq_short = x != y;
23 assign eq_long = x === y;
24 assign neq_long = x !== y;
25
26
27 assign and2 = x && y;
28 assign or2 = x || y;
29
30 assign andexp = x & y;
31 assign orexp = x | y;
32 assign nandexp = x ~& y;
33 assign norexp = x ~| y;
34
35 assign xorexp = x ^ y;
36 endmodule