2 Add, AddAssign, Div, DivAssign, Mul, MulAssign, Neg, Rem, RemAssign, Sub, SubAssign,
7 traits::{ConvertFrom, ConvertTo, Float},
10 #[cfg(feature = "f16")]
11 use half::f16 as F16Impl;
13 #[cfg(not(feature = "f16"))]
16 #[derive(Clone, Copy, PartialEq, PartialOrd, Debug)]
18 pub struct F16(F16Impl);
20 #[cfg(not(feature = "f16"))]
22 pub(crate) fn panic_f16_feature_disabled() -> ! {
23 panic!("f16 feature is not enabled")
26 #[cfg(feature = "f16")]
27 macro_rules! f16_impl {
28 ($v:expr, [$($vars:ident),*]) => {
33 #[cfg(not(feature = "f16"))]
34 macro_rules! f16_impl {
35 ($v:expr, [$($vars:ident),*]) => {
38 panic_f16_feature_disabled()
43 impl Default for F16 {
44 fn default() -> Self {
45 f16_impl!(F16(F16Impl::default()), [])
49 impl From<F16Impl> for F16 {
50 fn from(v: F16Impl) -> Self {
55 impl From<F16> for F16Impl {
56 fn from(v: F16) -> Self {
61 macro_rules! impl_f16_from {
64 impl From<$ty> for F16 {
65 fn from(v: $ty) -> Self {
66 f16_impl!(F16(F16Impl::from(v)), [v])
70 impl ConvertFrom<$ty> for F16 {
71 fn cvt_from(v: $ty) -> F16 {
79 macro_rules! impl_from_f16 {
82 impl From<F16> for $ty {
83 fn from(v: F16) -> Self {
84 f16_impl!(v.0.into(), [v])
88 impl ConvertFrom<F16> for $ty {
89 fn cvt_from(v: F16) -> Self {
97 impl_f16_from![i8, u8,];
99 impl_from_f16![f32, f64,];
101 macro_rules! impl_int_to_f16 {
102 ($($int:ident),*) => {
104 impl ConvertFrom<$int> for F16 {
105 fn cvt_from(v: $int) -> Self {
106 // f32 has enough mantissa bits such that f16 overflows to
107 // infinity before f32 stops being able to properly
108 // represent integer values, making the below conversion correct.
109 F16::cvt_from(v as f32)
116 macro_rules! impl_f16_to_int {
117 ($($int:ident),*) => {
119 impl ConvertFrom<F16> for $int {
120 fn cvt_from(v: F16) -> Self {
128 impl_int_to_f16![i16, u16, i32, u32, i64, u64, i128, u128];
129 impl_f16_to_int![i8, u8, i16, u16, i32, u32, i64, u64, i128, u128];
131 impl ConvertFrom<f32> for F16 {
132 fn cvt_from(v: f32) -> Self {
133 f16_impl!(F16(F16Impl::from_f32(v)), [v])
137 impl ConvertFrom<f64> for F16 {
138 fn cvt_from(v: f64) -> Self {
139 f16_impl!(F16(F16Impl::from_f64(v)), [v])
146 fn neg(self) -> Self::Output {
147 f16_impl!(Self::from_bits(self.to_bits() ^ 0x8000), [])
151 macro_rules! impl_bin_op_using_f32 {
152 ($($op:ident, $op_fn:ident, $op_assign:ident, $op_assign_fn:ident;)*) => {
157 fn $op_fn(self, rhs: Self) -> Self::Output {
158 f32::from(self).$op_fn(f32::from(rhs)).to()
162 impl $op_assign for F16 {
163 fn $op_assign_fn(&mut self, rhs: Self) {
164 *self = (*self).$op_fn(rhs);
171 impl_bin_op_using_f32! {
172 Add, add, AddAssign, add_assign;
173 Sub, sub, SubAssign, sub_assign;
174 Mul, mul, MulAssign, mul_assign;
175 Div, div, DivAssign, div_assign;
176 Rem, rem, RemAssign, rem_assign;
180 pub fn from_bits(v: u16) -> Self {
181 #[cfg(feature = "f16")]
182 return F16(F16Impl::from_bits(v));
183 #[cfg(not(feature = "f16"))]
186 pub fn to_bits(self) -> u16 {
187 #[cfg(feature = "f16")]
188 return self.0.to_bits();
189 #[cfg(not(feature = "f16"))]
192 pub fn abs(self) -> Self {
193 f16_impl!(Self::from_bits(self.to_bits() & 0x7FFF), [])
195 pub fn trunc(self) -> Self {
196 f32::from(self).trunc().to()
199 pub fn ceil(self) -> Self {
200 f32::from(self).ceil().to()
203 pub fn floor(self) -> Self {
204 f32::from(self).floor().to()
207 pub fn round(self) -> Self {
208 f32::from(self).round().to()
211 #[cfg(feature = "fma")]
212 pub fn fma(self, a: Self, b: Self) -> Self {
213 (f64::from(self) * f64::from(a) + f64::from(b)).to()
216 pub fn is_nan(self) -> bool {
217 f16_impl!(self.0.is_nan(), [])
220 pub fn is_infinite(self) -> bool {
221 f16_impl!(self.0.is_infinite(), [])
224 pub fn is_finite(self) -> bool {
225 f16_impl!(self.0.is_finite(), [])
229 impl Float for Value<F16> {
230 type FloatEncoding = F16;
231 type BitsType = Value<u16>;
232 type SignedBitsType = Value<i16>;
234 fn abs(self) -> Self {
238 fn trunc(self) -> Self {
239 Value(self.0.trunc())
242 fn ceil(self) -> Self {
246 fn floor(self) -> Self {
247 Value(self.0.floor())
250 fn round(self) -> Self {
251 Value(self.0.round())
254 #[cfg(feature = "fma")]
255 fn fma(self, a: Self, b: Self) -> Self {
256 Value(self.0.fma(a.0, b.0))
259 fn is_nan(self) -> Self::Bool {
260 Value(self.0.is_nan())
263 fn is_infinite(self) -> Self::Bool {
264 Value(self.0.is_infinite())
267 fn is_finite(self) -> Self::Bool {
268 Value(self.0.is_finite())
271 fn from_bits(v: Self::BitsType) -> Self {
272 Value(F16::from_bits(v.0))
275 fn to_bits(self) -> Self::BitsType {
276 Value(self.0.to_bits())
283 use core::cmp::Ordering;
287 not(feature = "f16"),
288 should_panic(expected = "f16 feature is not enabled")
291 assert_eq!(F16::from_bits(0x8000).abs().to_bits(), 0);
292 assert_eq!(F16::from_bits(0).abs().to_bits(), 0);
293 assert_eq!(F16::from_bits(0x8ABC).abs().to_bits(), 0xABC);
294 assert_eq!(F16::from_bits(0xFE00).abs().to_bits(), 0x7E00);
295 assert_eq!(F16::from_bits(0x7E00).abs().to_bits(), 0x7E00);
300 not(feature = "f16"),
301 should_panic(expected = "f16 feature is not enabled")
304 assert_eq!(F16::from_bits(0x8000).neg().to_bits(), 0);
305 assert_eq!(F16::from_bits(0).neg().to_bits(), 0x8000);
306 assert_eq!(F16::from_bits(0x8ABC).neg().to_bits(), 0xABC);
307 assert_eq!(F16::from_bits(0xFE00).neg().to_bits(), 0x7E00);
308 assert_eq!(F16::from_bits(0x7E00).neg().to_bits(), 0xFE00);
313 not(feature = "f16"),
314 should_panic(expected = "f16 feature is not enabled")
316 fn test_int_to_f16() {
317 assert_eq!(F16::to_bits(0u32.to()), 0);
318 for v in 1..0x20000u32 {
319 let leading_zeros = u32::leading_zeros(v);
320 let shifted_v = v << leading_zeros;
321 // round to nearest, ties to even
322 let round_up = match (shifted_v & 0x1FFFFF).cmp(&0x100000) {
323 Ordering::Less => false,
324 Ordering::Equal => (shifted_v & 0x200000) != 0,
325 Ordering::Greater => true,
327 let (rounded, carry) =
328 (shifted_v & !0x1FFFFF).overflowing_add(round_up.then(|| 0x200000).unwrap_or(0));
331 mantissa = (rounded >> 22) as u16 + 0x400;
333 mantissa = (rounded >> 21) as u16;
335 assert_eq!((mantissa & !0x3FF), 0x400);
336 let exponent = 31 - leading_zeros as u16 + 15 + carry as u16;
337 let expected = if exponent < 0x1F {
338 (mantissa & 0x3FF) + (exponent << 10)
342 let actual = F16::to_bits(v.to());
345 "actual = {:#X}, expected = {:#X}, v = {:#X}",