4 Author : Andrew Waterman, Yunsup Lee
8 Version : (under version control)
13 The RISC-V ISA Simulator implements a functional model of one or more
19 We assume that the RISCV environment variable is set to the RISC-V tools
20 install path, and that the riscv-fesvr package is installed there.
22 $ apt-get install device-tree-compiler
25 $ ../configure --prefix=$RISCV --with-fesvr=$RISCV
29 Compiling and Running a Simple C Program
30 -------------------------------------------
32 Install spike (see Build Steps), riscv-gnu-toolchain, and riscv-pk.
34 Write a short C program and name it hello.c. Then, compile it into a RISC-V
35 ELF binary named hello:
37 $ riscv64-unknown-elf-gcc -o hello hello.c
39 Now you can simulate the program atop the proxy kernel:
43 Simulating a New Instruction
44 ------------------------------------
46 Adding an instruction to the simulator requires two steps:
48 1. Describe the instruction's functional behavior in the file
49 riscv/insns/<new_instruction_name>.h. Examine other instructions
50 in that directory as a starting point.
52 2. Add the opcode and opcode mask to riscv/opcodes.h. Alternatively,
53 add it to the riscv-opcodes package, and it will do so for you:
56 $ vi opcodes // add a line for the new instruction
59 3. Rebuild the simulator.
61 Interactive Debug Mode
62 ---------------------------
64 To invoke interactive debug mode, launch spike with -d:
68 To see the contents of an integer register (0 is for core 0):
72 To see the contents of a floating point register:
80 depending upon whether you wish to print the register as single- or double-precision.
82 To see the contents of a memory location (physical address in hex):
86 To see the contents of memory with a virtual address (0 for core 0):
90 You can advance by one instruction by pressing <enter>. You can also
91 execute until a desired equality is reached:
93 : until pc 0 2020 (stop when pc=2020)
94 : until mem 2020 50a9907311096993 (stop when mem[2020]=50a9907311096993)
96 Alternatively, you can execute as long as an equality is true:
98 : while mem 2020 50a9907311096993
100 You can continue execution indefinitely by:
104 At any point during execution (even without -d), you can enter the
105 interactive debug mode with `<control>-<c>`.
107 To end the simulation from the debug prompt, press `<control>-<c>` or:
114 An alternative to interactive debug mode is to attach using gdb. Because spike
115 tries to be like real hardware, you also need OpenOCD to do that. OpenOCD
116 doesn't currently know about address translation, so it's not possible to
117 easily debug programs that are run under `pk`. We'll use the following test
121 char text[] = "Vafgehpgvba frgf jnag gb or serr!";
123 // Don't use the stack, because sp isn't set up.
124 volatile int wait = 1;
131 // Doesn't actually go on the stack, because there are lots of GPRs.
134 char lower = text[i] | 32;
135 if (lower >= 'a' && lower <= 'm')
137 else if (lower > 'm' && lower <= 'z')
146 OUTPUT_ARCH( "riscv" )
154 $ riscv64-unknown-elf-gcc -g -Og -o rot13-64.o -c rot13.c
155 $ riscv64-unknown-elf-gcc -g -Og -T spike.lds -nostartfiles -o rot13-64 rot13-64.o
158 To debug this program, first run spike telling it to listen for OpenOCD:
160 $ spike --rbb-port=9824 -m0x10000000:0x20000 rot13-64
161 Listening for remote bitbang connection on port 9824.
164 In a separate shell run OpenOCD with the appropriate configuration file:
167 interface remote_bitbang
168 remote_bitbang_host localhost
169 remote_bitbang_port 9824
172 jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
174 set _TARGETNAME $_CHIPNAME.cpu
175 target create $_TARGETNAME riscv -chain-position $_TARGETNAME
177 gdb_report_data_abort enable
181 $ openocd -f spike.cfg
182 Open On-Chip Debugger 0.10.0-dev-00002-gc3b344d (2017-06-08-12:14)
184 riscv.cpu: target state: halted
187 In yet another shell, start your gdb debug session:
189 tnewsome@compy-vm:~/SiFive/spike-test$ riscv64-unknown-elf-gdb rot13-64
190 GNU gdb (GDB) 7.12.50.20170505-git
191 Copyright (C) 2016 Free Software Foundation, Inc.
192 License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
193 This is free software: you are free to change and redistribute it.
194 There is NO WARRANTY, to the extent permitted by law. Type "show copying"
195 and "show warranty" for details.
196 This GDB was configured as "--host=x86_64-pc-linux-gnu --target=riscv64-unknown-elf".
197 Type "show configuration" for configuration details.
198 For bug reporting instructions, please see:
199 <http://www.gnu.org/software/gdb/bugs/>.
200 Find the GDB manual and other documentation resources online at:
201 <http://www.gnu.org/software/gdb/documentation/>.
202 For help, type "help".
203 Type "apropos word" to search for commands related to "word"...
204 Reading symbols from rot13-64...done.
205 (gdb) target remote localhost:3333
206 Remote debugging using localhost:3333
207 0x000000001001000a in main () at rot13.c:8
214 $3 = "Vafgehpgvba frgf jnag gb or serr!"
216 Breakpoint 1 at 0x10010064: file rot13.c, line 23.
220 Breakpoint 1, main () at rot13.c:23