726fb12632dcb48b2104b16763eb3fa5e1508e49
1 from nmigen
import Module
, Signal
4 """ Content Addressable Memory (CAM) Entry
6 The purpose of this module is to represent an entry within a CAM.
7 This module when given a read command will compare the given key
8 and output whether a match was found or not. When given a write
9 command it will write the given key and data into internal registers.
12 def __init__(self
, key_size
, data_size
):
14 * key_size: (bit count) The size of the key
15 * data_size: (bit count) The size of the data
18 self
.key
= Signal(key_size
)
21 self
.command
= Signal(2) # 00 => NA 01 => Read 10 => Write 11 => Reset
22 self
.key_in
= Signal(key_size
) # Reference key for the CAM
23 self
.data_in
= Signal(data_size
) # Data input when writing
26 self
.match
= Signal(1) # Result of the internal/input key comparison
27 self
.data
= Signal(data_size
)
29 def elaborate(self
, platform
=None):
31 with m
.Switch(self
.command
):
33 m
.d
.sync
+= self
.match
.eq(0)
35 with m
.If(self
.key_in
== self
.key
):
36 m
.d
.sync
+= self
.match
.eq(1)
38 m
.d
.sync
+= self
.match
.eq(0)
41 self
.key
.eq(self
.key_in
),
42 self
.data
.eq(self
.data_in
),