c5141a932f53f4d7f5201859d0bab864562ddd56
2 sys
.path
.append("../src")
3 sys
.path
.append("../../TestUtil")
5 from nmigen
.compat
.sim
import run_simulation
9 from test_helper
import assert_eq
, assert_ne
11 def set_cam(dut
, c
, a
, k
, d
):
12 yield dut
.command
.eq(c
)
13 yield dut
.address
.eq(a
)
14 yield dut
.key_in
.eq(k
)
15 yield dut
.data_in
.eq(d
)
18 def check_data_hit(dut
, dh
, op
):
19 out_dh
= yield dut
.data_hit
21 assert_eq("Data Hit", out_dh
, dh
)
23 assert_ne("Data Hit", out_dh
, dh
)
25 def check_data(dut
, d
, op
):
26 out_d
= yield dut
.data_out
28 assert_eq("Data", out_d
, d
)
30 assert_ne("Data", out_d
, d
)
32 def check_all(dut
, data_hit
, data
, dh_op
, d_op
):
33 yield from check_data_hit(dut
, data_hit
, dh_op
)
34 yield from check_data(dut
, data
, d_op
)
44 yield from set_cam(dut
, command
, address
, key
, data
)
45 yield from check_data_hit(dut
, data_hit
, 0)
53 yield from set_cam(dut
, command
, address
, key
, data
)
54 yield from check_data_hit(dut
, data_hit
, 0)
62 yield from set_cam(dut
, command
, address
, key
, data
)
63 yield from check_data_hit(dut
, data_hit
, 0)
71 yield from set_cam(dut
, command
, address
, key
, data
)
72 yield from check_all(dut
, data_hit
, data
, 0, 0)
80 yield from set_cam(dut
, command
, address
, key
, data
)
82 yield from check_all(dut
, data_hit
, data
, 0, 0)
87 if __name__
== "__main__":
89 run_simulation(dut
, testbench(dut
), vcd_name
="Waveforms/cam_test.vcd")
90 print("Cam Unit Test Success")