1 # This code should be functional. Doesn't have to be optimal.
2 # I'm writing it to prove that it can be done.
4 # TODO: Update these constants once they're finalized in the doc.
7 #define DCSR_CAUSE_DEBINT 3
8 #define DCSR_HALT_OFFSET 3
9 #define DCSR_DEBUGINT_OFFSET 10
11 #define DSCRATCH 0x792
16 #define DEBUG_RAM 0x400
17 #define DEBUG_RAM_SIZE 64
19 #define SETHALTNOT 0x100
20 #define CLEARHALTNOT 0x104
21 #define CLEARDEBINT 0x108
26 # Automatically called when Debug Mode is first entered.
28 # Should be called by Debug RAM code that has finished execution and
29 # wants to return to Debug Mode.
31 # Clear debug interrupt.
34 sw s1, CLEARDEBINT(zero)
37 andi s1, s1, (1<<DCSR_DEBUGINT_OFFSET)
38 bnez s1, wait_for_interrupt
42 bltz s1, restore_not_32
44 lw s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 4)(zero)
50 ld s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 8)(zero)
53 nop #lq s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 16)(zero)
57 andi s0, s0, (1<<DCSR_HALT_OFFSET)
71 # Check why we're here
73 # cause is in bits 2:0 of dcsr
75 addi s0, s0, -DCSR_CAUSE_DEBINT
76 bnez s0, spontaneous_halt
79 # Save s1 so that the debug program can use two registers.
83 sw s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 4)(zero)
89 sd s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 8)(zero)
92 nop #sq s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 16)(zero)
97 sw s0, SETHALTNOT(zero)
98 csrsi DCSR, DCSR_HALT_OFFSET
102 andi s0, s0, (1<<DCSR_DEBUGINT_OFFSET)
103 beqz s0, wait_for_interrupt