1 # This code should be functional. Doesn't have to be optimal.
2 # I'm writing it to prove that it can be done.
4 #include "riscv/encoding.h"
6 # TODO: Update these constants once they're finalized in the doc.
9 #define DCSR_CAUSE_DEBINT 3
10 #define DCSR_HALT_OFFSET 3
11 #define DCSR_DEBUGINT_OFFSET 10
13 #define DSCRATCH 0x792
15 #define DEBUG_RAM 0x400
16 #define DEBUG_RAM_SIZE 64
18 #define SETHALTNOT 0x100
19 #define CLEARDEBINT 0x108
25 # Automatically called when Debug Mode is first entered.
27 # Should be called by Debug RAM code that has finished execution and
28 # wants to return to Debug Mode.
32 # Set the last word of Debug RAM to all ones, to indicate that we hit
40 # Clear debug interrupt.
42 sw s1, CLEARDEBINT(zero)
47 bltz s1, restore_not_32
49 lw s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 4)(zero)
55 ld s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 8)(zero)
58 nop #lq s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 16)(zero)
60 # s0 contains ~0 if we got here through an exception, and 0 otherwise.
61 # Store this to the last word in Debug RAM so the debugger can tell if
62 # an exception occurred.
63 sw s0, (DEBUG_RAM + DEBUG_RAM_SIZE - 4)(zero)
67 andi s0, s0, (1<<DCSR_HALT_OFFSET)
82 # Check why we're here
84 # cause is in bits 2:0 of dcsr
86 addi s0, s0, -DCSR_CAUSE_DEBINT
87 bnez s0, spontaneous_halt
90 # Save s1 so that the debug program can use two registers.
94 sw s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 4)(zero)
100 sd s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 8)(zero)
103 nop #sq s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 16)(zero)
108 sw s0, SETHALTNOT(zero)
109 csrsi DCSR, (1<<DCSR_HALT_OFFSET)
113 andi s0, s0, (1<<DCSR_DEBUGINT_OFFSET)
114 beqz s0, wait_for_interrupt