1 # This code should be functional. Doesn't have to be optimal.
2 # I'm writing it to prove that it can be done.
4 #include "riscv/encoding.h"
6 # TODO: Update these constants once they're finalized in the doc.
9 #define DCSR_CAUSE_DEBINT 3
10 #define DCSR_HALT_OFFSET 3
11 #define DCSR_DEBUGINT_OFFSET 10
13 #define DSCRATCH 0x792
15 # TODO: Should be 0x400
16 #define DEBUG_RAM (-0x400)
17 #define DEBUG_RAM_SIZE 64
19 # TODO: Should be 0x100, 0x108
20 #define SETHALTNOT (-0x100)
21 #define CLEARDEBINT (-0x108)
26 # Automatically called when Debug Mode is first entered.
28 # Should be called by Debug RAM code that has finished execution and
29 # wants to return to Debug Mode.
31 # Clear debug interrupt.
34 sw s1, CLEARDEBINT(zero)
35 # TODO: race: what if the debugger sets debug int at this point?
38 andi s1, s1, (1<<DCSR_DEBUGINT_OFFSET)
39 bnez s1, clear_debint_loop
43 bltz s1, restore_not_32
45 lw s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 4)(zero)
51 ld s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 8)(zero)
54 nop #lq s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 16)(zero)
58 andi s0, s0, (1<<DCSR_HALT_OFFSET)
72 # Check why we're here
74 # cause is in bits 2:0 of dcsr
76 addi s0, s0, -DCSR_CAUSE_DEBINT
77 bnez s0, spontaneous_halt
80 # Save s1 so that the debug program can use two registers.
84 sw s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 4)(zero)
90 sd s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 8)(zero)
93 nop #sq s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 16)(zero)
98 sw s0, SETHALTNOT(zero)
99 csrsi DCSR, (1<<DCSR_HALT_OFFSET)
103 andi s0, s0, (1<<DCSR_DEBUGINT_OFFSET)
104 beqz s0, wait_for_interrupt