e4cb645473afdddd0ee94af5f60d11f7180586fe
1 # -*- explicit-buffer-name: "Makefile<6502/cmos45>" -*-
3 LOGICAL_SYNTHESIS
= Yosys
4 PHYSICAL_SYNTHESIS
= Coriolis
12 NETLISTS
= $(shell cat nets.txt
)
16 include .
/mk
/design-flow.mk
21 layout
: alu_hier_cts_r.ap
22 gds
: alu_hier_cts_r.gds
24 lvx
: lvx-alu_hier_cts_r
25 druc
: druc-alu_hier_cts_r
26 view
: cgt-alu_hier_cts_r
27 sim
: asimut-alu_hier_cts_r