1 // See LICENSE for license details.
3 #ifndef __TEST_MACROS_SCALAR_H
4 #define __TEST_MACROS_SCALAR_H
7 #-----------------------------------------------------------------------
9 #-----------------------------------------------------------------------
11 #define TEST_CASE( testnum, testreg, correctval, code... ) \
15 li TESTNUM, testnum; \
16 bne testreg, x29, fail;
18 # We use a macro hack to simpify code generation for various numbers
21 #define TEST_INSERT_NOPS_0
22 #define TEST_INSERT_NOPS_1 nop; TEST_INSERT_NOPS_0
23 #define TEST_INSERT_NOPS_2 nop; TEST_INSERT_NOPS_1
24 #define TEST_INSERT_NOPS_3 nop; TEST_INSERT_NOPS_2
25 #define TEST_INSERT_NOPS_4 nop; TEST_INSERT_NOPS_3
26 #define TEST_INSERT_NOPS_5 nop; TEST_INSERT_NOPS_4
27 #define TEST_INSERT_NOPS_6 nop; TEST_INSERT_NOPS_5
28 #define TEST_INSERT_NOPS_7 nop; TEST_INSERT_NOPS_6
29 #define TEST_INSERT_NOPS_8 nop; TEST_INSERT_NOPS_7
30 #define TEST_INSERT_NOPS_9 nop; TEST_INSERT_NOPS_8
31 #define TEST_INSERT_NOPS_10 nop; TEST_INSERT_NOPS_9
34 #-----------------------------------------------------------------------
36 #-----------------------------------------------------------------------
38 #-----------------------------------------------------------------------
39 # Tests for instructions with immediate operand
40 #-----------------------------------------------------------------------
42 #define SEXT_IMM(x) ((x) | (-(((x) >> 11) & 1) << 11))
44 #define TEST_IMM_OP( testnum, inst, result, val1, imm ) \
45 TEST_CASE( testnum, x3, result, \
47 inst x3, x1, SEXT_IMM(imm); \
50 #define TEST_IMM_SRC1_EQ_DEST( testnum, inst, result, val1, imm ) \
51 TEST_CASE( testnum, x1, result, \
53 inst x1, x1, SEXT_IMM(imm); \
56 #define TEST_IMM_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
57 TEST_CASE( testnum, x6, result, \
60 inst x3, x1, SEXT_IMM(imm); \
61 TEST_INSERT_NOPS_ ## nop_cycles \
68 #define TEST_IMM_SRC1_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
69 TEST_CASE( testnum, x3, result, \
72 TEST_INSERT_NOPS_ ## nop_cycles \
73 inst x3, x1, SEXT_IMM(imm); \
79 #define TEST_IMM_ZEROSRC1( testnum, inst, result, imm ) \
80 TEST_CASE( testnum, x1, result, \
81 inst x1, x0, SEXT_IMM(imm); \
84 #define TEST_IMM_ZERODEST( testnum, inst, val1, imm ) \
85 TEST_CASE( testnum, x0, 0, \
87 inst x0, x1, SEXT_IMM(imm); \
90 #-----------------------------------------------------------------------
91 # Tests for vector config instructions
92 #-----------------------------------------------------------------------
94 #define TEST_VSETCFGIVL( testnum, nxpr, nfpr, bank, vl, result ) \
95 TEST_CASE( testnum, x1, result, \
96 li x1, (bank << 12); \
97 vsetcfg x1,nxpr,nfpr; \
102 #define TEST_VVCFG( testnum, nxpr, nfpr, bank, vl, result ) \
103 TEST_CASE( testnum, x1, result, \
104 li x1, (bank << 12) | (nfpr << 6) | nxpr; \
110 #define TEST_VSETVL( testnum, nxpr, nfpr, bank, vl, result ) \
111 TEST_CASE( testnum, x1, result, \
112 li x1, (bank << 12); \
113 vsetcfg x1,nxpr,nfpr; \
118 #-----------------------------------------------------------------------
119 # Tests for an instruction with register operands
120 #-----------------------------------------------------------------------
122 #define TEST_R_OP( testnum, inst, result, val1 ) \
123 TEST_CASE( testnum, x3, result, \
128 #define TEST_R_SRC1_EQ_DEST( testnum, inst, result, val1 ) \
129 TEST_CASE( testnum, x1, result, \
134 #define TEST_R_DEST_BYPASS( testnum, nop_cycles, inst, result, val1 ) \
135 TEST_CASE( testnum, x6, result, \
139 TEST_INSERT_NOPS_ ## nop_cycles \
146 #-----------------------------------------------------------------------
147 # Tests for an instruction with register-register operands
148 #-----------------------------------------------------------------------
150 #define TEST_RR_OP( testnum, inst, result, val1, val2 ) \
151 TEST_CASE( testnum, x3, result, \
157 #define TEST_RR_SRC1_EQ_DEST( testnum, inst, result, val1, val2 ) \
158 TEST_CASE( testnum, x1, result, \
164 #define TEST_RR_SRC2_EQ_DEST( testnum, inst, result, val1, val2 ) \
165 TEST_CASE( testnum, x2, result, \
171 #define TEST_RR_SRC12_EQ_DEST( testnum, inst, result, val1 ) \
172 TEST_CASE( testnum, x1, result, \
177 #define TEST_RR_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, val2 ) \
178 TEST_CASE( testnum, x6, result, \
183 TEST_INSERT_NOPS_ ## nop_cycles \
190 #define TEST_RR_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
191 TEST_CASE( testnum, x3, result, \
194 TEST_INSERT_NOPS_ ## src1_nops \
196 TEST_INSERT_NOPS_ ## src2_nops \
203 #define TEST_RR_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
204 TEST_CASE( testnum, x3, result, \
207 TEST_INSERT_NOPS_ ## src1_nops \
209 TEST_INSERT_NOPS_ ## src2_nops \
216 #define TEST_RR_ZEROSRC1( testnum, inst, result, val ) \
217 TEST_CASE( testnum, x2, result, \
222 #define TEST_RR_ZEROSRC2( testnum, inst, result, val ) \
223 TEST_CASE( testnum, x2, result, \
228 #define TEST_RR_ZEROSRC12( testnum, inst, result ) \
229 TEST_CASE( testnum, x1, result, \
233 #define TEST_RR_ZERODEST( testnum, inst, val1, val2 ) \
234 TEST_CASE( testnum, x0, 0, \
240 #-----------------------------------------------------------------------
241 # Test memory instructions
242 #-----------------------------------------------------------------------
244 #define TEST_LD_OP( testnum, inst, result, offset, base ) \
245 TEST_CASE( testnum, x3, result, \
247 inst x3, offset(x1); \
250 #define TEST_ST_OP( testnum, load_inst, store_inst, result, offset, base ) \
251 TEST_CASE( testnum, x3, result, \
254 store_inst x2, offset(x1); \
255 load_inst x3, offset(x1); \
258 #define TEST_LD_DEST_BYPASS( testnum, nop_cycles, inst, result, offset, base ) \
260 li TESTNUM, testnum; \
263 inst x3, offset(x1); \
264 TEST_INSERT_NOPS_ ## nop_cycles \
272 #define TEST_LD_SRC1_BYPASS( testnum, nop_cycles, inst, result, offset, base ) \
274 li TESTNUM, testnum; \
277 TEST_INSERT_NOPS_ ## nop_cycles \
278 inst x3, offset(x1); \
285 #define TEST_ST_SRC12_BYPASS( testnum, src1_nops, src2_nops, load_inst, store_inst, result, offset, base ) \
287 li TESTNUM, testnum; \
290 TEST_INSERT_NOPS_ ## src1_nops \
292 TEST_INSERT_NOPS_ ## src2_nops \
293 store_inst x1, offset(x2); \
294 load_inst x3, offset(x2); \
301 #define TEST_ST_SRC21_BYPASS( testnum, src1_nops, src2_nops, load_inst, store_inst, result, offset, base ) \
303 li TESTNUM, testnum; \
306 TEST_INSERT_NOPS_ ## src1_nops \
308 TEST_INSERT_NOPS_ ## src2_nops \
309 store_inst x1, offset(x2); \
310 load_inst x3, offset(x2); \
317 #-----------------------------------------------------------------------
318 # Test branch instructions
319 #-----------------------------------------------------------------------
321 #define TEST_BR1_OP_TAKEN( testnum, inst, val1 ) \
323 li TESTNUM, testnum; \
326 bne x0, TESTNUM, fail; \
327 1: bne x0, TESTNUM, 3f; \
329 bne x0, TESTNUM, fail; \
332 #define TEST_BR1_OP_NOTTAKEN( testnum, inst, val1 ) \
334 li TESTNUM, testnum; \
337 bne x0, TESTNUM, 2f; \
338 1: bne x0, TESTNUM, fail; \
342 #define TEST_BR1_SRC1_BYPASS( testnum, nop_cycles, inst, val1 ) \
344 li TESTNUM, testnum; \
347 TEST_INSERT_NOPS_ ## nop_cycles \
353 #define TEST_BR2_OP_TAKEN( testnum, inst, val1, val2 ) \
355 li TESTNUM, testnum; \
359 bne x0, TESTNUM, fail; \
360 1: bne x0, TESTNUM, 3f; \
361 2: inst x1, x2, 1b; \
362 bne x0, TESTNUM, fail; \
365 #define TEST_BR2_OP_NOTTAKEN( testnum, inst, val1, val2 ) \
367 li TESTNUM, testnum; \
371 bne x0, TESTNUM, 2f; \
372 1: bne x0, TESTNUM, fail; \
373 2: inst x1, x2, 1b; \
376 #define TEST_BR2_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
378 li TESTNUM, testnum; \
381 TEST_INSERT_NOPS_ ## src1_nops \
383 TEST_INSERT_NOPS_ ## src2_nops \
389 #define TEST_BR2_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
391 li TESTNUM, testnum; \
394 TEST_INSERT_NOPS_ ## src1_nops \
396 TEST_INSERT_NOPS_ ## src2_nops \
402 #-----------------------------------------------------------------------
403 # Test jump instructions
404 #-----------------------------------------------------------------------
406 #define TEST_JR_SRC1_BYPASS( testnum, nop_cycles, inst ) \
408 li TESTNUM, testnum; \
411 TEST_INSERT_NOPS_ ## nop_cycles \
413 bne x0, TESTNUM, fail; \
418 #define TEST_JALR_SRC1_BYPASS( testnum, nop_cycles, inst ) \
420 li TESTNUM, testnum; \
423 TEST_INSERT_NOPS_ ## nop_cycles \
425 bne x0, TESTNUM, fail; \
431 #-----------------------------------------------------------------------
433 #-----------------------------------------------------------------------
435 #-----------------------------------------------------------------------
436 # Tests floating-point instructions
437 #-----------------------------------------------------------------------
439 #define TEST_FP_OP_S_INTERNAL( testnum, flags, result, val1, val2, val3, code... ) \
441 li TESTNUM, testnum; \
442 la a0, test_ ## testnum ## _data ;\
455 test_ ## testnum ## _data: \
463 #define TEST_FP_OP_D_INTERNAL( testnum, flags, result, val1, val2, val3, code... ) \
465 li TESTNUM, testnum; \
466 la a0, test_ ## testnum ## _data ;\
479 test_ ## testnum ## _data: \
487 #define TEST_FCVT_S_D( testnum, result, val1 ) \
488 TEST_FP_OP_D_INTERNAL( testnum, 0, double result, val1, 0.0, 0.0, \
489 fcvt.s.d f3, f0; fcvt.d.s f3, f3; fmv.x.d a0, f3)
491 #define TEST_FCVT_D_S( testnum, result, val1 ) \
492 TEST_FP_OP_S_INTERNAL( testnum, 0, float result, val1, 0.0, 0.0, \
493 fcvt.d.s f3, f0; fcvt.s.d f3, f3; fmv.x.s a0, f3)
495 #define TEST_FP_OP1_S( testnum, inst, result, val1 ) \
496 TEST_FP_OP_S_INTERNAL( testnum, 0, float result, val1, 0.0, 0.0, \
497 inst f3, f0; fmv.x.s a0, f3)
499 #define TEST_FP_OP1_D( testnum, inst, result, val1 ) \
500 TEST_FP_OP_D_INTERNAL( testnum, 0, double result, val1, 0.0, 0.0, \
501 inst f3, f0; fmv.x.d a0, f3)
503 #define TEST_FP_OP2_S( testnum, inst, flags, result, val1, val2 ) \
504 TEST_FP_OP_S_INTERNAL( testnum, flags, float result, val1, val2, 0.0, \
505 inst f3, f0, f1; fmv.x.s a0, f3)
507 #define TEST_FP_OP2_D( testnum, inst, flags, result, val1, val2 ) \
508 TEST_FP_OP_D_INTERNAL( testnum, flags, double result, val1, val2, 0.0, \
509 inst f3, f0, f1; fmv.x.d a0, f3)
511 #define TEST_FP_OP3_S( testnum, inst, flags, result, val1, val2, val3 ) \
512 TEST_FP_OP_S_INTERNAL( testnum, flags, float result, val1, val2, val3, \
513 inst f3, f0, f1, f2; fmv.x.s a0, f3)
515 #define TEST_FP_OP3_D( testnum, inst, flags, result, val1, val2, val3 ) \
516 TEST_FP_OP_D_INTERNAL( testnum, flags, double result, val1, val2, val3, \
517 inst f3, f0, f1, f2; fmv.x.d a0, f3)
519 #define TEST_FP_INT_OP_S( testnum, inst, flags, result, val1, rm ) \
520 TEST_FP_OP_S_INTERNAL( testnum, flags, word result, val1, 0.0, 0.0, \
523 #define TEST_FP_INT_OP_D( testnum, inst, flags, result, val1, rm ) \
524 TEST_FP_OP_D_INTERNAL( testnum, flags, dword result, val1, 0.0, 0.0, \
527 #define TEST_FP_CMP_OP_S( testnum, inst, result, val1, val2 ) \
528 TEST_FP_OP_S_INTERNAL( testnum, 0, word result, val1, val2, 0.0, \
531 #define TEST_FP_CMP_OP_D( testnum, inst, result, val1, val2 ) \
532 TEST_FP_OP_D_INTERNAL( testnum, 0, dword result, val1, val2, 0.0, \
535 #define TEST_INT_FP_OP_S( testnum, inst, result, val1 ) \
537 li TESTNUM, testnum; \
538 la a0, test_ ## testnum ## _data ;\
547 test_ ## testnum ## _data: \
551 #define TEST_INT_FP_OP_D( testnum, inst, result, val1 ) \
553 li TESTNUM, testnum; \
554 la a0, test_ ## testnum ## _data ;\
563 test_ ## testnum ## _data: \
568 #-----------------------------------------------------------------------
570 #-----------------------------------------------------------------------
572 #define TEST_ILLEGAL_TVEC_REGID( testnum, nxreg, nfreg, inst, reg1, reg2) \
573 la a0, handler ## testnum; \
575 vsetcfg nxreg, nfreg; \
582 lui a0,%hi(vtcode1 ## testnum); \
583 vf %lo(vtcode1 ## testnum)(a0); \
585 illegal ## testnum: \
590 vtcode1 ## testnum: \
593 vtcode2 ## testnum: \
596 handler ## testnum: \
600 li a1,HWACHA_CAUSE_TVEC_ILLEGAL_REGID; \
603 la a1, illegal ## testnum; \
613 lui a0,%hi(vtcode2 ## testnum); \
614 vf %lo(vtcode2 ## testnum)(a0); \
632 #define TEST_ILLEGAL_VT_REGID( testnum, nxreg, nfreg, inst, reg1, reg2, reg3) \
633 la a0, handler ## testnum; \
635 vsetcfg nxreg, nfreg; \
642 lui a0,%hi(vtcode1 ## testnum); \
643 vf %lo(vtcode1 ## testnum)(a0); \
647 vtcode1 ## testnum: \
649 illegal ## testnum: \
650 inst reg1, reg2, reg3; \
652 vtcode2 ## testnum: \
655 handler ## testnum: \
659 li a1,HWACHA_CAUSE_VF_ILLEGAL_REGID; \
662 la a1,illegal ## testnum; \
671 lui a0,%hi(vtcode2 ## testnum); \
672 vf %lo(vtcode2 ## testnum)(a0); \
690 #-----------------------------------------------------------------------
691 # Pass and fail code (assumes test num is in TESTNUM)
692 #-----------------------------------------------------------------------
694 #define TEST_PASSFAIL \
695 bne x0, TESTNUM, pass; \
702 #-----------------------------------------------------------------------
704 #-----------------------------------------------------------------------