1 #ifndef __TEST_MACROS_VECTOR_H
2 #define __TEST_MACROS_VECTOR_H
5 #define EXTRA_INIT RVTEST_VEC_ENABLE
7 #-----------------------------------------------------------------------
9 #-----------------------------------------------------------------------
11 #define TEST_CASE( testnum, testreg, correctval, code... ) \
12 TEST_CASE_NREG( testnum, 32, 32, testreg, correctval, code )
14 # We use j fail, because for some cases branches are not enough to jump to fail
16 #define TEST_CASE_NREG( testnum, nxreg, nfreg, testreg, correctval, code... ) \
18 vsetcfg nxreg,nfreg; \
21 lui a0,%hi(vtcode ## testnum ); \
22 vf %lo(vtcode ## testnum )(a0); \
24 vsd v ## testreg, a4; \
28 li TESTNUM, testnum; \
29 test_loop ## testnum: \
31 beq a0,a1,skip ## testnum; \
36 bne a2,a3,test_loop ## testnum; \
43 # We use a macro hack to simpify code generation for various numbers
46 #define TEST_INSERT_NOPS_0
47 #define TEST_INSERT_NOPS_1 nop; TEST_INSERT_NOPS_0
48 #define TEST_INSERT_NOPS_2 nop; TEST_INSERT_NOPS_1
49 #define TEST_INSERT_NOPS_3 nop; TEST_INSERT_NOPS_2
50 #define TEST_INSERT_NOPS_4 nop; TEST_INSERT_NOPS_3
51 #define TEST_INSERT_NOPS_5 nop; TEST_INSERT_NOPS_4
52 #define TEST_INSERT_NOPS_6 nop; TEST_INSERT_NOPS_5
53 #define TEST_INSERT_NOPS_7 nop; TEST_INSERT_NOPS_6
54 #define TEST_INSERT_NOPS_8 nop; TEST_INSERT_NOPS_7
55 #define TEST_INSERT_NOPS_9 nop; TEST_INSERT_NOPS_8
56 #define TEST_INSERT_NOPS_10 nop; TEST_INSERT_NOPS_9
59 #-----------------------------------------------------------------------
61 #-----------------------------------------------------------------------
63 #-----------------------------------------------------------------------
64 # Tests for instructions with immediate operand
65 #-----------------------------------------------------------------------
67 #define SEXT_IMM(x) ((x) | (-(((x) >> 11) & 1) << 11))
69 #define TEST_IMM_OP( testnum, inst, result, val1, imm ) \
70 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
72 inst x3, x1, SEXT_IMM(imm); \
75 #define TEST_IMM_SRC1_EQ_DEST( testnum, inst, result, val1, imm ) \
76 TEST_CASE_NREG( testnum, 2, 0, x1, result, \
78 inst x1, x1, SEXT_IMM(imm); \
81 #define TEST_IMM_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
82 TEST_CASE_NREG( testnum, 5, 0, x4, result, \
84 inst x3, x1, SEXT_IMM(imm); \
85 TEST_INSERT_NOPS_ ## nop_cycles \
89 #define TEST_IMM_SRC1_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
90 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
92 TEST_INSERT_NOPS_ ## nop_cycles \
93 inst x3, x1, SEXT_IMM(imm); \
96 #define TEST_IMM_ZEROSRC1( testnum, inst, result, imm ) \
97 TEST_CASE_NREG( testnum, 2, 0, x1, result, \
98 inst x1, x0, SEXT_IMM(imm); \
101 #define TEST_IMM_ZERODEST( testnum, inst, val1, imm ) \
102 TEST_CASE_NREG( testnum, 2, 0, x0, 0, \
104 inst x0, x1, SEXT_IMM(imm); \
107 #-----------------------------------------------------------------------
108 # Tests for an instruction with register operands
109 #-----------------------------------------------------------------------
111 #define TEST_R_OP( testnum, inst, result, val1 ) \
112 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
117 #define TEST_R_SRC1_EQ_DEST( testnum, inst, result, val1 ) \
118 TEST_CASE_NREG( testnum, 2, 0, x1, result, \
123 #define TEST_R_DEST_BYPASS( testnum, nop_cycles, inst, result, val1 ) \
124 TEST_CASE_NREG( testnum, 5, 0, x4, result, \
127 TEST_INSERT_NOPS_ ## nop_cycles \
131 #-----------------------------------------------------------------------
132 # Tests for an instruction with register-register operands
133 #-----------------------------------------------------------------------
135 #define TEST_RR_OP( testnum, inst, result, val1, val2 ) \
136 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
142 #define TEST_RR_SRC1_EQ_DEST( testnum, inst, result, val1, val2 ) \
143 TEST_CASE_NREG( testnum, 3, 0, x1, result, \
149 #define TEST_RR_SRC2_EQ_DEST( testnum, inst, result, val1, val2 ) \
150 TEST_CASE_NREG( testnum, 3, 0, x2, result, \
156 #define TEST_RR_SRC12_EQ_DEST( testnum, inst, result, val1 ) \
157 TEST_CASE_NREG( testnum, 2, 0, x1, result, \
162 #define TEST_RR_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, val2 ) \
163 TEST_CASE_NREG( testnum, 5, 0, x4, result, \
167 TEST_INSERT_NOPS_ ## nop_cycles \
171 #define TEST_RR_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
172 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
174 TEST_INSERT_NOPS_ ## src1_nops \
176 TEST_INSERT_NOPS_ ## src2_nops \
180 #define TEST_RR_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
181 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
183 TEST_INSERT_NOPS_ ## src1_nops \
185 TEST_INSERT_NOPS_ ## src2_nops \
189 #define TEST_RR_ZEROSRC1( testnum, inst, result, val ) \
190 TEST_CASE_NREG( testnum, 3, 0, x2, result, \
195 #define TEST_RR_ZEROSRC2( testnum, inst, result, val ) \
196 TEST_CASE_NREG( testnum, 3, 0, x2, result, \
201 #define TEST_RR_ZEROSRC12( testnum, inst, result ) \
202 TEST_CASE_NREG( testnum, 2, 0, x1, result, \
206 #define TEST_RR_ZERODEST( testnum, inst, val1, val2 ) \
207 TEST_CASE_NREG( testnum, 3, 0, x0, 0, \
214 #-----------------------------------------------------------------------
216 #-----------------------------------------------------------------------
218 #-----------------------------------------------------------------------
219 # Tests floating-point instructions
220 #-----------------------------------------------------------------------
222 #define TEST_FP_OP_S_INTERNAL_NREG( testnum, nxreg, nfreg, result, val1, val2, val3, code... ) \
224 vsetcfg nxreg,nfreg; \
227 la a5, test_ ## testnum ## _data ;\
228 vflstw vf0, a5, x0; \
230 vflstw vf1, a5, x0; \
232 vflstw vf2, a5, x0; \
234 lui a0,%hi(vtcode ## testnum ); \
235 vf %lo(vtcode ## testnum )(a0); \
241 li TESTNUM, testnum; \
242 test_loop ## testnum: \
244 beq a0,a1,skip ## testnum; \
249 bne a2,a3,test_loop ## testnum; \
251 vtcode ## testnum : \
255 test_ ## testnum ## _data: \
262 #define TEST_FP_OP_D_INTERNAL_NREG( testnum, nxreg, nfreg, result, val1, val2, val3, code... ) \
264 vsetcfg nxreg,nfreg; \
267 la a5, test_ ## testnum ## _data ;\
268 vflstd vf0, a5, x0; \
270 vflstd vf1, a5, x0; \
272 vflstd vf2, a5, x0; \
274 lui a0,%hi(vtcode ## testnum ); \
275 vf %lo(vtcode ## testnum )(a0); \
281 li TESTNUM, testnum; \
282 test_loop ## testnum: \
284 beq a0,a1,skip ## testnum; \
289 bne a2,a3,test_loop ## testnum; \
291 vtcode ## testnum : \
295 test_ ## testnum ## _data: \
302 #define TEST_FCVT_S_D( testnum, result, val1 ) \
303 TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, 0.0, 0.0, \
304 fcvt.s.d f3, f0; fcvt.d.s f3, f3; fmv.x.d x1, f3)
306 #define TEST_FCVT_D_S( testnum, result, val1 ) \
307 TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, 0.0, 0.0, \
308 fcvt.d.s f3, f0; fcvt.s.d f3, f3; fmv.x.s x1, f3)
310 #define TEST_FP_OP2_S( testnum, inst, flags, result, val1, val2 ) \
311 TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, val2, 0.0, \
312 inst f3, f0, f1; fmv.x.s x1, f3)
314 #define TEST_FP_OP2_D( testnum, inst, flags, result, val1, val2 ) \
315 TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, val2, 0.0, \
316 inst f3, f0, f1; fmv.x.d x1, f3)
318 #define TEST_FP_OP3_S( testnum, inst, flags, result, val1, val2, val3 ) \
319 TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, val2, val3, \
320 inst f3, f0, f1, f2; fmv.x.s x1, f3)
322 #define TEST_FP_OP3_D( testnum, inst, flags, result, val1, val2, val3 ) \
323 TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, val2, val3, \
324 inst f3, f0, f1, f2; fmv.x.d x1, f3)
326 #define TEST_FP_INT_OP_S( testnum, inst, flags, result, val1, rm ) \
327 TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, word result, val1, 0.0, 0.0, \
330 #define TEST_FP_INT_OP_D( testnum, inst, flags, result, val1, rm ) \
331 TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, dword result, val1, 0.0, 0.0, \
334 #define TEST_FP_CMP_OP_S( testnum, inst, result, val1, val2 ) \
335 TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, word result, val1, val2, 0.0, \
338 #define TEST_FP_CMP_OP_D( testnum, inst, result, val1, val2 ) \
339 TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, dword result, val1, val2, 0.0, \
342 #define TEST_INT_FP_OP_S( testnum, inst, result, val1 ) \
347 lui a0,%hi(vtcode ## testnum ); \
348 vf %lo(vtcode ## testnum )(a0); \
352 la a5, test_ ## testnum ## _data ;\
355 li TESTNUM, testnum; \
356 test_loop ## testnum: \
358 beq a0,a1,skip ## testnum; \
363 bne a2,a3,test_loop ## testnum; \
365 vtcode ## testnum : \
371 test_ ## testnum ## _data: \
375 #define TEST_INT_FP_OP_D( testnum, inst, result, val1 ) \
380 lui a0,%hi(vtcode ## testnum ); \
381 vf %lo(vtcode ## testnum )(a0); \
385 la a5, test_ ## testnum ## _data ;\
388 li TESTNUM, testnum; \
389 test_loop ## testnum: \
391 beq a0,a1,skip ## testnum; \
396 bne a2,a3,test_loop ## testnum; \
398 vtcode ## testnum : \
404 test_ ## testnum ## _data: \
409 #-----------------------------------------------------------------------
411 #-----------------------------------------------------------------------
413 #-----------------------------------------------------------------------
414 # Test branch instructions
415 #-----------------------------------------------------------------------
417 #define TEST_BR2_OP_TAKEN( testnum, inst, val1, val2) \
418 TEST_CASE_NREG( testnum, 4, 0, x3, 0, \
426 2: inst x1, x2, 1b; \
431 #define TEST_BR2_OP_NOTTAKEN( testnum, inst, val1, val2 ) \
432 TEST_CASE_NREG( testnum, 4, 0, x3, 0, \
440 2: inst x1, x2, 1b; \
444 #define TEST_BR2_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
445 TEST_CASE_NREG( testnum, 6, 0, x3, 0, \
449 TEST_INSERT_NOPS_ ## src1_nops \
451 TEST_INSERT_NOPS_ ## src2_nops \
461 #define TEST_BR2_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
462 TEST_CASE_NREG( testnum, 6, 0, x3, 0, \
466 TEST_INSERT_NOPS_ ## src1_nops \
468 TEST_INSERT_NOPS_ ## src2_nops \
478 #define TEST_BR2_DIVERGED_ODD_EVEN( testnum, inst, n, result, code...) \
479 TEST_CASE_NREG( testnum, 5, 0, x3, result, \
495 #define TEST_BR2_DIVERGED_FULL12( testnum, inst, n, result, code... ) \
496 TEST_CASE_NREG( testnum, 5, 0, x3, result, \
510 #define TEST_BR2_DIVERGED_FULL21( testnum, inst, n, result, code... ) \
511 TEST_CASE_NREG( testnum, 5, 0, x3, result, \
525 #define TEST_CASE_NREG_MEM( testnum, nxreg, nfreg, correctval, code... ) \
527 vsetcfg nxreg,nfreg; \
530 lui a0,%hi(vtcode ## testnum ); \
531 vf %lo(vtcode ## testnum )(a0); \
536 li TESTNUM, testnum; \
537 test_loop ## testnum: \
539 beq a0,a1,skip ## testnum; \
544 bne a2,a3,test_loop ## testnum; \
546 vtcode ## testnum : \
551 #define TEST_BR2_DIVERGED_MEM_FULL12( testnum, inst, n) \
552 TEST_CASE_NREG_MEM( testnum, 7, 0, 1, \
572 #define TEST_BR2_DIVERGED_MEM_FULL21( testnum, inst, n) \
573 TEST_CASE_NREG_MEM( testnum, 7, 0, 1, \
593 #-----------------------------------------------------------------------
594 # Pass and fail code (assumes test num is in TESTNUM)
595 #-----------------------------------------------------------------------
597 #define TEST_PASSFAIL \
598 bne x0, TESTNUM, pass; \
605 #-----------------------------------------------------------------------
607 #-----------------------------------------------------------------------